Use llvm::popcount instead of llvm::countPopulation(NFC)

clang-tools-extra/pseudo/include/clang-pseudo/grammar/LRTable.h

@@ -226,7 +226,7 @@ class LRTable {
       // Count the number of values since the checkpoint.
       Word BelowKeyMask = KeyMask - 1;
       unsigned CountSinceCheckpoint =
-          llvm::countPopulation(HasValue[KeyWord] & BelowKeyMask);
+          llvm::popcount(HasValue[KeyWord] & BelowKeyMask);
       // Find the value relative to the last checkpoint.
       return Values[Checkpoints[KeyWord] + CountSinceCheckpoint];
     }

clang/lib/Basic/Sanitizers.cpp

@@ -61,7 +61,7 @@ namespace clang {
 unsigned SanitizerMask::countPopulation() const {
   unsigned total = 0;
   for (const auto &Val : maskLoToHigh)
-    total += llvm::countPopulation(Val);
+    total += llvm::popcount(Val);
   return total;
 }
 

lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp

@@ -8970,7 +8970,7 @@ static bool DumpEnumValue(const clang::QualType &qual_type, Stream *s,
   for (auto *enumerator : enum_decl->enumerators()) {
     uint64_t val = enumerator->getInitVal().getSExtValue();
     val = llvm::SignExtend64(val, 8*byte_size);
-    if (llvm::countPopulation(val) != 1 && (val & ~covered_bits) != 0)
+    if (llvm::popcount(val) != 1 && (val & ~covered_bits) != 0)
       can_be_bitfield = false;
     covered_bits |= val;
     ++num_enumerators;
@@ -9006,9 +9006,10 @@ static bool DumpEnumValue(const clang::QualType &qual_type, Stream *s,
   // Sort in reverse order of the number of the population count,  so that in
   // `enum {A, B, ALL = A|B }` we visit ALL first. Use a stable sort so that
   // A | C where A is declared before C is displayed in this order.
-  std::stable_sort(values.begin(), values.end(), [](const auto &a, const auto &b) {
-        return llvm::countPopulation(a.first) > llvm::countPopulation(b.first);
-      });
+  std::stable_sort(values.begin(), values.end(),
+                   [](const auto &a, const auto &b) {
+                     return llvm::popcount(a.first) > llvm::popcount(b.first);
+                   });
 
   for (const auto &val : values) {
     if ((remaining_value & val.first) != val.first)

lldb/source/Symbol/CompactUnwindInfo.cpp

@@ -156,7 +156,7 @@ FLAGS_ANONYMOUS_ENUM(){
 
 #define EXTRACT_BITS(value, mask)                                              \
   ((value >> llvm::countTrailingZeros(static_cast<uint32_t>(mask))) &          \
-   (((1 << llvm::countPopulation(static_cast<uint32_t>(mask)))) - 1))
+   (((1 << llvm::popcount(static_cast<uint32_t>(mask)))) - 1))
 
 // constructor
 

llvm/include/llvm/ADT/APInt.h

@@ -1618,7 +1618,7 @@ class [[nodiscard]] APInt {
   /// \returns 0 if the value is zero, otherwise returns the number of set bits.
   unsigned countPopulation() const {
     if (isSingleWord())
-      return llvm::countPopulation(U.VAL);
+      return llvm::popcount(U.VAL);
     return countPopulationSlowCase();
   }
 

llvm/include/llvm/ADT/BitVector.h

@@ -155,7 +155,7 @@ class BitVector {
   size_type count() const {
     unsigned NumBits = 0;
     for (auto Bit : Bits)
-      NumBits += countPopulation(Bit);
+      NumBits += llvm::popcount(Bit);
     return NumBits;
   }
 

llvm/include/llvm/ADT/SmallBitVector.h

@@ -200,7 +200,7 @@ class SmallBitVector {
   size_type count() const {
     if (isSmall()) {
       uintptr_t Bits = getSmallBits();
-      return countPopulation(Bits);
+      return llvm::popcount(Bits);
     }
     return getPointer()->count();
   }

llvm/include/llvm/ADT/SparseBitVector.h

@@ -120,7 +120,7 @@ template <unsigned ElementSize = 128> struct SparseBitVectorElement {
   size_type count() const {
     unsigned NumBits = 0;
     for (unsigned i = 0; i < BITWORDS_PER_ELEMENT; ++i)
-      NumBits += countPopulation(Bits[i]);
+      NumBits += llvm::popcount(Bits[i]);
     return NumBits;
   }
 

llvm/include/llvm/CodeGen/TargetLowering.h

@@ -2267,7 +2267,7 @@ class TargetLoweringBase {
     if (Exponent < 0)
       Exponent = -Exponent;
     return !OptForSize ||
-           (countPopulation((unsigned int)Exponent) + Log2_32(Exponent) < 7);
+           (llvm::popcount((unsigned int)Exponent) + Log2_32(Exponent) < 7);
   }
 
   //===--------------------------------------------------------------------===//

llvm/include/llvm/MC/LaneBitmask.h

@@ -73,9 +73,7 @@ namespace llvm {
 
     constexpr Type getAsInteger() const { return Mask; }
 
-    unsigned getNumLanes() const {
-      return countPopulation(Mask);
-    }
+    unsigned getNumLanes() const { return llvm::popcount(Mask); }
     unsigned getHighestLane() const {
       return Log2_64(Mask);
     }

llvm/include/llvm/MC/SubtargetFeature.h

@@ -95,7 +95,7 @@ class FeatureBitset {
   size_t count() const {
     size_t Count = 0;
     for (auto B : Bits)
-      Count += countPopulation(B);
+      Count += llvm::popcount(B);
     return Count;
   }
 

llvm/include/llvm/MCA/HardwareUnits/ResourceManager.h

@@ -247,7 +247,7 @@ class ResourceState {
   }
 
   unsigned getNumUnits() const {
-    return isAResourceGroup() ? 1U : countPopulation(ResourceSizeMask);
+    return isAResourceGroup() ? 1U : llvm::popcount(ResourceSizeMask);
   }
 
   /// Checks if there is an available slot in the resource buffer.

llvm/lib/Analysis/MemoryProfileInfo.cpp

@@ -92,7 +92,7 @@ static void addAllocTypeAttribute(LLVMContext &Ctx, CallBase *CI,
 }
 
 static bool hasSingleAllocType(uint8_t AllocTypes) {
-  const unsigned NumAllocTypes = countPopulation(AllocTypes);
+  const unsigned NumAllocTypes = llvm::popcount(AllocTypes);
   assert(NumAllocTypes != 0);
   return NumAllocTypes == 1;
 }

llvm/lib/CodeGen/CodeGenPrepare.cpp

@@ -2603,7 +2603,7 @@ struct ExtAddrMode : public TargetLowering::AddrMode {
     if (Scale && other.Scale && Scale != other.Scale)
       Result |= ScaleField;
 
-    if (countPopulation(Result) > 1)
+    if (llvm::popcount(Result) > 1)
       return MultipleFields;
     else
       return static_cast<FieldName>(Result);

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

@@ -1069,7 +1069,7 @@ void IRTranslator::emitBitTestCase(SwitchCG::BitTestBlock &BB,
 
   LLT SwitchTy = getLLTForMVT(BB.RegVT);
   Register Cmp;
-  unsigned PopCount = countPopulation(B.Mask);
+  unsigned PopCount = llvm::popcount(B.Mask);
   if (PopCount == 1) {
     // Testing for a single bit; just compare the shift count with what it
     // would need to be to shift a 1 bit in that position.

llvm/lib/CodeGen/MachinePipeliner.cpp

@@ -1022,7 +1022,7 @@ struct FuncUnitSorter {
            make_range(InstrItins->beginStage(SchedClass),
                       InstrItins->endStage(SchedClass))) {
         InstrStage::FuncUnits funcUnits = IS.getUnits();
-        unsigned numAlternatives = countPopulation(funcUnits);
+        unsigned numAlternatives = llvm::popcount(funcUnits);
         if (numAlternatives < min) {
           min = numAlternatives;
           F = funcUnits;
@@ -1068,7 +1068,7 @@ struct FuncUnitSorter {
            make_range(InstrItins->beginStage(SchedClass),
                       InstrItins->endStage(SchedClass))) {
         InstrStage::FuncUnits FuncUnits = IS.getUnits();
-        if (countPopulation(FuncUnits) == 1)
+        if (llvm::popcount(FuncUnits) == 1)
           Resources[FuncUnits]++;
       }
       return;

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

@@ -2895,7 +2895,7 @@ void SelectionDAGBuilder::visitBitTestCase(BitTestBlock &BB,
   MVT VT = BB.RegVT;
   SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), dl, Reg, VT);
   SDValue Cmp;
-  unsigned PopCount = countPopulation(B.Mask);
+  unsigned PopCount = llvm::popcount(B.Mask);
   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
   if (PopCount == 1) {
     // Testing for a single bit; just compare the shift count with what it

llvm/lib/DebugInfo/PDB/Native/GlobalsStream.cpp

@@ -156,7 +156,7 @@ readGSIHashBuckets(FixedStreamArray<support::ulittle32_t> &HashBuckets,
 
   uint32_t NumBuckets = 0;
   for (uint32_t B : HashBitmap)
-    NumBuckets += countPopulation(B);
+    NumBuckets += llvm::popcount(B);
 
   // Hash buckets follow.
   if (auto EC = Reader.readArray(HashBuckets, NumBuckets))

llvm/lib/MC/MCSchedule.cpp

@@ -140,7 +140,7 @@ MCSchedModel::getReciprocalThroughput(unsigned SchedClass,
   for (; I != E; ++I) {
     if (!I->getCycles())
       continue;
-    double Temp = countPopulation(I->getUnits()) * 1.0 / I->getCycles();
+    double Temp = llvm::popcount(I->getUnits()) * 1.0 / I->getCycles();
     Throughput = Throughput ? std::min(*Throughput, Temp) : Temp;
   }
   if (Throughput)

llvm/lib/MCA/HardwareUnits/ResourceManager.cpp

@@ -65,7 +65,7 @@ void DefaultResourceStrategy::used(uint64_t Mask) {
 ResourceState::ResourceState(const MCProcResourceDesc &Desc, unsigned Index,
                              uint64_t Mask)
     : ProcResourceDescIndex(Index), ResourceMask(Mask),
-      BufferSize(Desc.BufferSize), IsAGroup(countPopulation(ResourceMask) > 1) {
+      BufferSize(Desc.BufferSize), IsAGroup(llvm::popcount(ResourceMask) > 1) {
   if (IsAGroup) {
     ResourceSizeMask =
         ResourceMask ^ 1ULL << getResourceStateIndex(ResourceMask);
@@ -79,7 +79,7 @@ ResourceState::ResourceState(const MCProcResourceDesc &Desc, unsigned Index,
 
 bool ResourceState::isReady(unsigned NumUnits) const {
   return (!isReserved() || isADispatchHazard()) &&
-         countPopulation(ReadyMask) >= NumUnits;
+         (unsigned)llvm::popcount(ReadyMask) >= NumUnits;
 }
 
 ResourceStateEvent ResourceState::isBufferAvailable() const {
@@ -293,7 +293,7 @@ uint64_t ResourceManager::checkAvailability(const InstrDesc &Desc) const {
     }
 
     if (Desc.HasPartiallyOverlappingGroups && !RS.isAResourceGroup()) {
-      unsigned NumAvailableUnits = countPopulation(RS.getReadyMask());
+      unsigned NumAvailableUnits = llvm::popcount(RS.getReadyMask());
       NumAvailableUnits -= NumUnits;
       AvailableUnits[E.first] = NumAvailableUnits;
       if (!NumAvailableUnits)
@@ -325,7 +325,7 @@ uint64_t ResourceManager::checkAvailability(const InstrDesc &Desc) const {
       auto it = AvailableUnits.find(ResourceMask);
       if (it == AvailableUnits.end()) {
         unsigned Index = getResourceStateIndex(ResourceMask);
-        unsigned NumUnits = countPopulation(Resources[Index]->getReadyMask());
+        unsigned NumUnits = llvm::popcount(Resources[Index]->getReadyMask());
         it =
             AvailableUnits.insert(std::make_pair(ResourceMask, NumUnits)).first;
       }
@@ -362,7 +362,7 @@ void ResourceManager::issueInstruction(
       Pipes.emplace_back(std::pair<ResourceRef, ResourceCycles>(
           Pipe, ResourceCycles(CS.size())));
     } else {
-      assert((countPopulation(R.first) > 1) && "Expected a group!");
+      assert((llvm::popcount(R.first) > 1) && "Expected a group!");
       // Mark this group as reserved.
       assert(R.second.isReserved());
       reserveResource(R.first);
@@ -379,7 +379,7 @@ void ResourceManager::cycleEvent(SmallVectorImpl<ResourceRef> &ResourcesFreed) {
       // Release this resource.
       const ResourceRef &RR = BR.first;
 
-      if (countPopulation(RR.first) == 1)
+      if (llvm::popcount(RR.first) == 1)
         release(RR);
       releaseResource(RR.first);
       ResourcesFreed.push_back(RR);

llvm/lib/MCA/InstrBuilder.cpp

@@ -102,8 +102,8 @@ static void initializeUsedResources(InstrDesc &ID,
   // Sort elements by mask popcount, so that we prioritize resource units over
   // resource groups, and smaller groups over larger groups.
   sort(Worklist, [](const ResourcePlusCycles &A, const ResourcePlusCycles &B) {
-    unsigned popcntA = countPopulation(A.first);
-    unsigned popcntB = countPopulation(B.first);
+    unsigned popcntA = llvm::popcount(A.first);
+    unsigned popcntB = llvm::popcount(B.first);
     if (popcntA < popcntB)
       return true;
     if (popcntA > popcntB)
@@ -122,15 +122,15 @@ static void initializeUsedResources(InstrDesc &ID,
   for (unsigned I = 0, E = Worklist.size(); I < E; ++I) {
     ResourcePlusCycles &A = Worklist[I];
     if (!A.second.size()) {
-      assert(countPopulation(A.first) > 1 && "Expected a group!");
+      assert(llvm::popcount(A.first) > 1 && "Expected a group!");
       UsedResourceGroups |= PowerOf2Floor(A.first);
       continue;
     }
 
     ID.Resources.emplace_back(A);
     uint64_t NormalizedMask = A.first;
 
-    if (countPopulation(A.first) == 1) {
+    if (llvm::popcount(A.first) == 1) {
       UsedResourceUnits |= A.first;
     } else {
       // Remove the leading 1 from the resource group mask.
@@ -146,7 +146,7 @@ static void initializeUsedResources(InstrDesc &ID,
       ResourcePlusCycles &B = Worklist[J];
       if ((NormalizedMask & B.first) == NormalizedMask) {
         B.second.CS.subtract(A.second.size() - SuperResources[A.first]);
-        if (countPopulation(B.first) > 1)
+        if (llvm::popcount(B.first) > 1)
           B.second.NumUnits++;
       }
     }
@@ -170,11 +170,11 @@ static void initializeUsedResources(InstrDesc &ID,
   // extra delay on top of the 2 cycles latency.
   // During those extra cycles, HWPort01 is not usable by other instructions.
   for (ResourcePlusCycles &RPC : ID.Resources) {
-    if (countPopulation(RPC.first) > 1 && !RPC.second.isReserved()) {
+    if (llvm::popcount(RPC.first) > 1 && !RPC.second.isReserved()) {
       // Remove the leading 1 from the resource group mask.
       uint64_t Mask = RPC.first ^ PowerOf2Floor(RPC.first);
-      uint64_t MaxResourceUnits = countPopulation(Mask);
-      if (RPC.second.NumUnits > countPopulation(Mask)) {
+      uint64_t MaxResourceUnits = llvm::popcount(Mask);
+      if (RPC.second.NumUnits > (unsigned)llvm::popcount(Mask)) {
         RPC.second.setReserved();
         RPC.second.NumUnits = MaxResourceUnits;
       }

llvm/lib/MCA/Stages/ExecuteStage.cpp

@@ -274,7 +274,7 @@ void ExecuteStage::notifyReservedOrReleasedBuffers(const InstRef &IR,
   if (!UsedBuffers)
     return;
 
-  SmallVector<unsigned, 4> BufferIDs(countPopulation(UsedBuffers), 0);
+  SmallVector<unsigned, 4> BufferIDs(llvm::popcount(UsedBuffers), 0);
   for (unsigned I = 0, E = BufferIDs.size(); I < E; ++I) {
     uint64_t CurrentBufferMask = UsedBuffers & (-UsedBuffers);
     BufferIDs[I] = HWS.getResourceID(CurrentBufferMask);

llvm/lib/Support/APInt.cpp

@@ -684,7 +684,7 @@ unsigned APInt::countTrailingOnesSlowCase() const {
 unsigned APInt::countPopulationSlowCase() const {
   unsigned Count = 0;
   for (unsigned i = 0; i < getNumWords(); ++i)
-    Count += llvm::countPopulation(U.pVal[i]);
+    Count += llvm::popcount(U.pVal[i]);
   return Count;
 }
 

llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

@@ -2151,7 +2151,7 @@ void AMDGPUDAGToDAGISel::SelectS_BFE(SDNode *N) {
         uint32_t MaskVal = Mask->getZExtValue();
 
         if (isMask_32(MaskVal)) {
-          uint32_t WidthVal = countPopulation(MaskVal);
+          uint32_t WidthVal = llvm::popcount(MaskVal);
           ReplaceNode(N, getBFE32(false, SDLoc(N), Srl.getOperand(0), ShiftVal,
                                   WidthVal));
           return;
@@ -2172,7 +2172,7 @@ void AMDGPUDAGToDAGISel::SelectS_BFE(SDNode *N) {
         uint32_t MaskVal = Mask->getZExtValue() >> ShiftVal;
 
         if (isMask_32(MaskVal)) {
-          uint32_t WidthVal = countPopulation(MaskVal);
+          uint32_t WidthVal = llvm::popcount(MaskVal);
           ReplaceNode(N, getBFE32(false, SDLoc(N), And.getOperand(0), ShiftVal,
                       WidthVal));
           return;

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

@@ -1140,7 +1140,7 @@ static Value *simplifyAMDGCNMemoryIntrinsicDemanded(InstCombiner &IC,
     unsigned DMaskVal = DMask->getZExtValue() & 0xf;
 
     // Mask off values that are undefined because the dmask doesn't cover them
-    DemandedElts &= (1 << countPopulation(DMaskVal)) - 1;
+    DemandedElts &= (1 << llvm::popcount(DMaskVal)) - 1;
 
     unsigned NewDMaskVal = 0;
     unsigned OrigLoadIdx = 0;

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

@@ -1807,7 +1807,7 @@ bool AMDGPUInstructionSelector::selectImageIntrinsic(
     }
   } else {
     DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm();
-    DMaskLanes = BaseOpcode->Gather4 ? 4 : countPopulation(DMask);
+    DMaskLanes = BaseOpcode->Gather4 ? 4 : llvm::popcount(DMask);
 
     if (BaseOpcode->Store) {
       VDataIn = MI.getOperand(1).getReg();

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

@@ -4906,7 +4906,7 @@ bool AMDGPULegalizerInfo::legalizeImageIntrinsic(
     if (BaseOpcode->Gather4) {
       DMaskLanes = 4;
     } else if (DMask != 0) {
-      DMaskLanes = countPopulation(DMask);
+      DMaskLanes = llvm::popcount(DMask);
     } else if (!IsTFE && !BaseOpcode->Store) {
       // If dmask is 0, this is a no-op load. This can be eliminated.
       B.buildUndef(MI.getOperand(0));

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

@@ -3628,7 +3628,7 @@ bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst,
 
   bool IsPackedD16 = false;
   unsigned DataSize =
-    (Desc.TSFlags & SIInstrFlags::Gather4) ? 4 : countPopulation(DMask);
+      (Desc.TSFlags & SIInstrFlags::Gather4) ? 4 : llvm::popcount(DMask);
   if (hasPackedD16()) {
     int D16Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::d16);
     IsPackedD16 = D16Idx >= 0;

llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp

@@ -934,7 +934,7 @@ DecodeStatus AMDGPUDisassembler::convertMIMGInst(MCInst &MI) const {
   }
 
   unsigned DMask = MI.getOperand(DMaskIdx).getImm() & 0xf;
-  unsigned DstSize = IsGather4 ? 4 : std::max(countPopulation(DMask), 1u);
+  unsigned DstSize = IsGather4 ? 4 : std::max(llvm::popcount(DMask), 1);
 
   bool D16 = D16Idx >= 0 && MI.getOperand(D16Idx).getImm();
   if (D16 && AMDGPU::hasPackedD16(STI)) {

llvm/lib/Target/AMDGPU/EvergreenInstructions.td

@@ -35,7 +35,7 @@ def IMMZeroBasedBitfieldMask : ImmLeaf <i32, [{
 }]>;
 
 def IMMPopCount : SDNodeXForm<imm, [{
-  return CurDAG->getTargetConstant(countPopulation(N->getZExtValue()), SDLoc(N),
+  return CurDAG->getTargetConstant(llvm::popcount(N->getZExtValue()), SDLoc(N),
                                    MVT::i32);
 }]>;