A 1.8 mw perception chip with near-sensor processing scheme for low-power aiot applications

Z Liu, E Ren, L Luo, Q Wei, X Wu, X Li… - 2019 IEEE Computer …, 2019 - ieeexplore.ieee.org
Z Liu, E Ren, L Luo, Q Wei, X Wu, X Li, F Qiao, XJ Liu, H Yang
2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019ieeexplore.ieee.org
In the past few years, the demand for intelligence of IoT front-end devices has dramatically
increased. However, such devices face challenges of limited on-chip resources and strict
power or energy constraints. Recent progress in binarized neural networks has provided
promising solutions for front-end processing system to conduct simple detection and
classification tasks by making trade-offs between the processing quality and the computation
complexity. In this paper, we propose a mixed-signal perception chip, in which an ADC-free …
In the past few years, the demand for intelligence of IoT front-end devices has dramatically increased. However, such devices face challenges of limited on-chip resources and strict power or energy constraints. Recent progress in binarized neural networks has provided promising solutions for front-end processing system to conduct simple detection and classification tasks by making trade-offs between the processing quality and the computation complexity. In this paper, we propose a mixed-signal perception chip, in which an ADC-free 32×32 image sensor and a BNN processing array are directly integrated with a 180nm standard CMOS process. Taking advantage of the ADC-free processing architecture, the whole processing system only consumes 1.8mW power, while providing up to 545.4 GOPS/W energy efficiency. The implementation performance and energy efficiency are comparable with the state-of-the-art designs in much more advanced CMOS technologies. This work provides a promising alternative for low-power IoT intelligent applications.
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