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msm8916.dtsi
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/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "skeleton64.dtsi"
#include <dt-bindings/clock/msm-clocks-8916.h>
/ {
model = "Qualcomm MSM8916";
compatible = "qcom,msm8916";
qcom,msm-id = <206 0>;
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
sdhc2 = &sdhc_2; /* SDC2 SD card slot */
/* smdtty devices */
smd1 = &smdtty_apps_fm;
smd2 = &smdtty_apps_riva_bt_acl;
smd3 = &smdtty_apps_riva_bt_cmd;
smd4 = &smdtty_mbalbridge;
smd5 = &smdtty_apps_riva_ant_cmd;
smd6 = &smdtty_apps_riva_ant_data;
smd7 = &smdtty_data1;
smd8 = &smdtty_data4;
smd11 = &smdtty_data11;
smd21 = &smdtty_data21;
smd36 = &smdtty_loopback;
spi0 = &spi_0; /* SPI0 controller device */
i2c0 = &i2c_0; /* I2C0 controller device */
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x0>;
enable-method = "qcom,arm-cortex-acc";
qcom,acc = <&acc0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x1>;
enable-method = "qcom,arm-cortex-acc";
qcom,acc = <&acc1>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x2>;
enable-method = "qcom,arm-cortex-acc";
qcom,acc = <&acc2>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x3>;
enable-method = "qcom,arm-cortex-acc";
qcom,acc = <&acc3>;
};
};
memory {
#address-cells = <2>;
#size-cells = <2>;
removed_regions: removed_regions@0 {
linux,reserve-contiguous-region;
linux,reserve-region;
linux,remove-completely;
reg = <0x0 0x88800000 0x0 0x06e00000>;
label = "removed_regions";
};
secure_mem: secure_region@0 {
linux,reserve-contiguous-region;
reg = <0 0 0 0x6D00000>;
label = "secure_mem";
};
qseecom_mem: qseecom_region@0 {
linux,reserve-contiguous-region;
reg = <0 0 0 0xd00000>;
label = "qseecom_mem";
};
audio_mem: audio_region@0 {
linux,reserve-contiguous-region;
linux,reserve-region;
reg = <0 0 0 0x314000>;
label = "audio_mem";
};
};
soc: soc { };
};
#include "msm8916-ion.dtsi"
#include "msm8916-coresight.dtsi"
#include "msm8916-smp2p.dtsi"
#include "msm8916-ipcrouter.dtsi"
#include "msm-gdsc-8916.dtsi"
#include "msm8916-iommu.dtsi"
#include "msm8916-gpu.dtsi"
#include "msm8916-mdss.dtsi"
#include "msm8916-mdss-pll.dtsi"
#include "msm8916-iommu-domains.dtsi"
#include "msm8916-bus.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
acc0:clock-controller@b088000 {
compatible = "qcom,arm-cortex-acc";
reg = <0x0b088000 0x1000>,
<0x0b008000 0x1000>;
};
acc1:clock-controller@b098000 {
compatible = "qcom,arm-cortex-acc";
reg = <0x0b098000 0x1000>,
<0x0b008000 0x1000>;
};
acc2:clock-controller@b0a8000 {
compatible = "qcom,arm-cortex-acc";
reg = <0x0b0a8000 0x1000>,
<0x0b008000 0x1000>;
};
acc3:clock-controller@b0b8000 {
compatible = "qcom,arm-cortex-acc";
reg = <0x0b0b8000 0x1000>,
<0x0b008000 0x1000>;
};
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x0b000000 0x1000>,
<0x0b002000 0x1000>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 2 0xf08>,
<1 3 0xf08>,
<1 4 0xf08>,
<1 1 0xf08>;
clock-frequency = <19200000>;
};
timer@b020000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "arm,armv7-timer-mem";
reg = <0xb020000 0x1000>;
clock-frequency = <19200000>;
frame@b021000 {
frame-number = <0>;
interrupts = <0 8 0x4>,
<0 7 0x4>;
reg = <0xb021000 0x1000>,
<0xb022000 0x1000>;
};
frame@b023000 {
frame-number = <1>;
interrupts = <0 9 0x4>;
reg = <0xb023000 0x1000>;
status = "disabled";
};
frame@b024000 {
frame-number = <2>;
interrupts = <0 10 0x4>;
reg = <0xb024000 0x1000>;
status = "disabled";
};
frame@b025000 {
frame-number = <3>;
interrupts = <0 11 0x4>;
reg = <0xb025000 0x1000>;
status = "disabled";
};
frame@b026000 {
frame-number = <4>;
interrupts = <0 12 0x4>;
reg = <0xb026000 0x1000>;
status = "disabled";
};
frame@b027000 {
frame-number = <5>;
interrupts = <0 13 0x4>;
reg = <0xb027000 0x1000>;
status = "disabled";
};
frame@b028000 {
frame-number = <6>;
interrupts = <0 14 0x4>;
reg = <0xb028000 0x1000>;
status = "disabled";
};
};
clock_rpm: qcom,rpmcc@1800000 {
compatible = "qcom,rpmcc-8916";
reg = <0x1800000 0x80000>;
reg-names = "cc_base";
#clock-cells = <1>;
};
clock_gcc: qcom,gcc@1800000 {
compatible = "qcom,gcc-8916";
reg = <0x1800000 0x80000>,
<0xb016000 0x00040>;
reg-names = "cc_base", "apcs_base";
vdd_dig-supply = <&pm8916_s1_corner>;
vdd_sr2_dig-supply = <&pm8916_s1_corner_ao>;
vdd_sr2_pll-supply = <&pm8916_l7_ao>;
clocks = <&clock_rpm clk_xo_gcc>,
<&clock_rpm clk_xo_a_clk_src>;
clock-names = "xo", "xo_a";
#clock-cells = <1>;
};
clock_debug: qcom,cc-debug@1874000 {
compatible = "qcom,cc-debug-8916";
reg = <0x1874000 0x4>;
clocks = <&clock_rpm clk_rpm_debug_mux>;
clock-names = "rpm_debug_mux";
#clock-cells = <1>;
};
tsens: tsens@4a8000 {
compatible = "qcom,msm8916-tsens";
reg = <0x4a8000 0x2000>,
<0x5c000 0x1000>;
reg-names = "tsens_physical", "tsens_eeprom_physical";
interrupts = <0 184 0>;
qcom,sensors = <5>;
qcom,slope = <3200 3200 3200 3200 3200>;
qcom,sensor-id = <0 1 2 4 5>;
};
qcom,clock-a7@0b011050 {
compatible = "qcom,clock-a53-8916";
reg = <0x0b011050 0x8>;
reg-names = "rcg-base";
qcom,safe-freq = < 400000000 >;
cpu-vdd-supply = <&apc_vreg_corner>;
clocks = <&clock_gcc clk_gpll0_ao_clk_src>,
<&clock_gcc clk_a53sspll>;
clock-names = "clk-4", "clk-5";
qcom,speed0-bin-v0 =
< 0 0>,
< 400000000 1>,
< 800000000 2>,
< 1401600000 3>;
};
qcom,cpubw {
compatible = "qcom,cpubw";
qcom,cpu-mem-ports = <1 512>;
qcom,bw-tbl =
/* 73 9.60 MHz */
/* 381 50MHz */
< 762 /* 100 MHz */>,
< 1525 /* 200 MHz */>,
< 3051 /* 400 MHz */>,
< 4066 /* 533 MHz */>;
};
qcom,msm-cpufreq@0 {
reg = <0 4>;
compatible = "qcom,msm-cpufreq";
qcom,cpufreq-table =
< 200000 762>,
< 400000 762>,
< 533330 1525>,
< 800000 1525>,
< 998400 1525>,
< 1094400 3051>,
< 1190400 3051>,
< 1248000 4066>,
< 1401600 4066>;
};
qcom,sps {
compatible = "qcom,msm_sps_4k";
qcom,device-type = <3>;
qcom,pipe-attr-ee;
};
blsp1_uart1: serial@78af000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0x78af000 0x200>;
interrupts = <0 107 0>;
status = "disabled";
clocks = <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>,
<&clock_gcc clk_gcc_blsp1_ahb_clk>;
clock-names = "core_clk", "iface_clk";
};
blsp1_uart2: serial@78b0000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0x78b0000 0x200>;
interrupts = <0 108 0>;
status = "disabled";
clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
<&clock_gcc clk_gcc_blsp1_ahb_clk>;
clock-names = "core_clk", "iface_clk";
};
qcom,usbbam@78c4000 {
compatible = "qcom,usb-bam-msm";
reg = <0x78c4000 0x15000>;
reg-names = "hsusb";
interrupts = <0 135 0>;
interrupt-names = "hsusb";
qcom,usb-bam-num-pipes = <2>;
qcom,usb-bam-fifo-baseaddr = <0x08603800>;
qcom,ignore-core-reset-ack;
qcom,disable-clk-gating;
qcom,pipe0 {
label = "hsusb-qdss-in-0";
qcom,usb-bam-mem-type = <3>;
qcom,bam-type = <1>;
qcom,dir = <1>;
qcom,pipe-num = <0>;
qcom,peer-bam = <1>;
qcom,src-bam-physical-address = <0x884000>;
qcom,src-bam-pipe-index = <0>;
qcom,dst-bam-physical-address = <0x78c4000>;
qcom,dst-bam-pipe-index = <0>;
qcom,data-fifo-offset = <0x0>;
qcom,data-fifo-size = <0x600>;
qcom,descriptor-fifo-offset = <0x600>;
qcom,descriptor-fifo-size = <0x200>;
};
};
usb_otg: usb@78d9000 {
compatible = "qcom,hsusb-otg";
reg = <0x78d9000 0x400>;
interrupts = <0 134 0>,<0 140 0>;
interrupt-names = "core_irq", "async_irq";
hsusb_vdd_dig-supply = <&pm8916_s1_corner>;
HSUSB_1p8-supply = <&pm8916_l7>;
HSUSB_3p3-supply = <&pm8916_l13>;
qcom,vdd-voltage-level = <1 5 7>;
qcom,hsusb-otg-phy-type = <2>;
qcom,hsusb-otg-mode = <1>;
qcom,hsusb-otg-otg-control = <2>;
qcom,hsusb-otg-disable-reset;
qcom,dp-manual-pullup;
qcom,msm-bus,name = "usb2";
qcom,msm-bus,num-cases = <3>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<87 512 0 0>,
<87 512 60000 960000>,
<87 512 6000 6000>;
clocks = <&clock_gcc clk_gcc_usb_hs_ahb_clk>,
<&clock_gcc clk_gcc_usb_hs_system_clk>,
<&clock_gcc clk_gcc_usb2a_phy_sleep_clk>,
<&clock_rpm clk_xo_otg_clk>;
clock-names = "iface_clk", "core_clk", "sleep_clk",
"xo";
};
android_usb {
compatible = "qcom,android-usb";
qcom,android-usb-swfi-latency = <1>;
};
rmtfs_sharedmem {
compatible = "qcom,sharedmem-uio";
reg = <0x8e580000 0x160000>;
reg-names = "rmtfs";
};
dsp_sharedmem {
compatible = "qcom,sharedmem-uio";
reg = <0x8e6e0000 0x20000>;
reg-names = "rfsa_dsp";
};
mdm_sharedmem {
compatible = "qcom,sharedmem-uio";
reg = <0x8e6e0000 0x20000>;
reg-names = "rfsa_mdm";
};
sdhc_1: sdhci@07824000 {
compatible = "qcom,sdhci-msm";
reg = <0x07824900 0x11c>, <0x07824000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <0 123 0>, <0 138 0>;
interrupt-names = "hc_irq", "pwr_irq";
qcom,bus-width = <8>;
qcom,msm-bus,name = "sdhc1";
qcom,msm-bus,num-cases = <8>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
<78 512 1600 3200>, /* 400 KB/s*/
<78 512 80000 160000>, /* 20 MB/s */
<78 512 100000 200000>, /* 25 MB/s */
<78 512 200000 400000>, /* 50 MB/s */
<78 512 400000 800000>, /* 100 MB/s */
<78 512 400000 800000>, /* 200 MB/s */
<78 512 2048000 4096000>; /* Max. bandwidth */
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
100000000 200000000 4294967295>;
clocks = <&clock_gcc clk_gcc_sdcc1_ahb_clk>,
<&clock_gcc clk_gcc_sdcc1_apps_clk>;
clock-names = "iface_clk", "core_clk";
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
status = "disabled";
};
sdhc_2: sdhci@07864000 {
compatible = "qcom,sdhci-msm";
reg = <0x07864900 0x11c>, <0x07864000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <0 125 0>, <0 221 0>;
interrupt-names = "hc_irq", "pwr_irq";
qcom,bus-width = <4>;
qcom,msm-bus,name = "sdhc2";
qcom,msm-bus,num-cases = <8>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
<81 512 1600 3200>, /* 400 KB/s*/
<81 512 80000 160000>, /* 20 MB/s */
<81 512 100000 200000>, /* 25 MB/s */
<81 512 200000 400000>, /* 50 MB/s */
<81 512 400000 800000>, /* 100 MB/s */
<81 512 400000 800000>, /* 200 MB/s */
<81 512 2048000 4096000>; /* Max. bandwidth */
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
100000000 200000000 4294967295>;
clocks = <&clock_gcc clk_gcc_sdcc2_ahb_clk>,
<&clock_gcc clk_gcc_sdcc2_apps_clk>;
clock-names = "iface_clk", "core_clk";
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
status = "disabled";
};
qcom,ipc-spinlock@1905000 {
compatible = "qcom,ipc-spinlock-sfpb";
reg = <0x1905000 0x8000>;
qcom,num-locks = <8>;
};
qcom,msm-adsp-loader {
compatible = "qcom,adsp-loader";
qcom,adsp-state = <0>;
qcom,proc-img-to-load = "modem";
};
qcom_crypto: qcrypto@720000 {
compatible = "qcom,qcrypto";
reg = <0x720000 0x20000>,
<0x704000 0x20000>;
reg-names = "crypto-base","crypto-bam-base";
interrupts = <0 207 0>;
qcom,bam-pipe-pair = <2>;
qcom,ce-hw-instance = <0>;
qcom,ce-device = <0>;
qcom,ce-hw-shared;
qcom,msm-bus,name = "qcrypto-noc";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<55 512 0 0>,
<55 512 3936000 393600>;
clocks = <&clock_gcc clk_crypto_clk_src>,
<&clock_gcc clk_gcc_crypto_clk>,
<&clock_gcc clk_gcc_crypto_ahb_clk>,
<&clock_gcc clk_gcc_crypto_axi_clk>;
clock-names = "core_clk_src", "core_clk",
"iface_clk", "bus_clk";
status = "disabled";
};
qcom_cedev: qcedev@720000 {
compatible = "qcom,qcedev";
reg = <0x720000 0x20000>,
<0x704000 0x20000>;
reg-names = "crypto-base","crypto-bam-base";
interrupts = <0 207 0>;
qcom,bam-pipe-pair = <1>;
qcom,ce-hw-instance = <0>;
qcom,ce-device = <0>;
qcom,ce-hw-shared;
qcom,msm-bus,name = "qcedev-noc";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<55 512 0 0>,
<55 512 3936000 393600>;
clocks = <&clock_gcc clk_crypto_clk_src>,
<&clock_gcc clk_gcc_crypto_clk>,
<&clock_gcc clk_gcc_crypto_ahb_clk>,
<&clock_gcc clk_gcc_crypto_axi_clk>;
clock-names = "core_clk_src", "core_clk",
"iface_clk", "bus_clk";
status = "disabled";
};
qcom_seecom: qseecom@8e700000 {
compatible = "qcom,qseecom";
reg = <0x8e700000 0x300000>;
reg-names = "secapp-region";
qcom,disk-encrypt-pipe-pair = <2>;
qcom,hlos-ce-hw-instance = <0>;
qcom,qsee-ce-hw-instance = <0>;
qcom,msm-bus,name = "qseecom-noc";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,num-paths = <1>;
qcom,support-bus-scaling;
qcom,msm-bus,vectors-KBps =
<55 512 0 0>,
<55 512 0 0>,
<55 512 120000 1200000>,
<55 512 393600 3936000>;
clocks = <&clock_gcc clk_crypto_clk_src>,
<&clock_gcc clk_gcc_crypto_clk>,
<&clock_gcc clk_gcc_crypto_ahb_clk>,
<&clock_gcc clk_gcc_crypto_axi_clk>;
clock-names = "core_clk_src", "core_clk",
"iface_clk", "bus_clk";
status = "disabled";
};
qcom,wdt@b017000 {
compatible = "qcom,msm-watchdog";
reg = <0xb017000 0x1000>;
interrupts = <0 3 0>, <0 4 0>;
qcom,bark-time = <11000>;
qcom,pet-time = <10000>;
qcom,ipi-ping;
};
qcom,msm-rtb {
compatible = "qcom,msm-rtb";
qcom,rtb-size = <0x100000>;
};
qcom,smem@8e200000 {
compatible = "qcom,smem";
reg = <0x8e200000 0x100000>,
<0x0b011008 0x4>,
<0x60000 0x8000>,
<0x193D000 0x8>;
reg-names = "smem", "irq-reg-base", "aux-mem1", "smem_targ_info_reg";
qcom,mpu-enabled;
qcom,smd-modem {
compatible = "qcom,smd";
qcom,smd-edge = <0>;
qcom,smd-irq-offset = <0x0>;
qcom,smd-irq-bitmask = <0x1000>;
qcom,pil-string = "modem";
interrupts = <0 25 1>;
};
qcom,smsm-modem {
compatible = "qcom,smsm";
qcom,smsm-edge = <0>;
qcom,smsm-irq-offset = <0x0>;
qcom,smsm-irq-bitmask = <0x2000>;
interrupts = <0 26 1>;
};
qcom,smd-wcnss {
compatible = "qcom,smd";
qcom,smd-edge = <6>;
qcom,smd-irq-offset = <0x0>;
qcom,smd-irq-bitmask = <0x20000>;
qcom,pil-string = "wcnss";
interrupts = <0 142 1>;
};
qcom,smsm-wcnss {
compatible = "qcom,smsm";
qcom,smsm-edge = <6>;
qcom,smsm-irq-offset = <0x0>;
qcom,smsm-irq-bitmask = <0x80000>;
interrupts = <0 144 1>;
};
qcom,smd-rpm {
compatible = "qcom,smd";
qcom,smd-edge = <15>;
qcom,smd-irq-offset = <0x0>;
qcom,smd-irq-bitmask = <0x1>;
interrupts = <0 168 1>;
qcom,irq-no-suspend;
};
};
rpm_bus: qcom,rpm-smd {
compatible = "qcom,rpm-smd";
rpm-channel-name = "rpm_requests";
rpm-channel-type = <15>; /* SMD_APPS_RPM */
};
qcom,bam_dmux@4044000 {
compatible = "qcom,bam_dmux";
reg = <0x4044000 0x19000>;
interrupts = <0 29 1>;
qcom,rx-ring-size = <32>;
};
qcom_tzlog: tz-log@8600720 {
compatible = "qcom,tz-log";
reg = <0x08600720 0x1000>;
status = "disabled";
};
qcom_rng: qrng@22000 {
compatible = "qcom,msm-rng";
reg = <0x22000 0x200>;
qcom,msm-rng-iface-clk;
qcom,msm-bus,name = "msm-rng-noc";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<1 618 0 0>, /* No vote */
<1 618 0 800>; /* 100 MB/s */
clocks = <&clock_gcc clk_gcc_prng_ahb_clk>;
clock-names = "iface_clk";
status = "disabled";
};
sound {
compatible = "qcom,msm8x16-audio-codec";
qcom,model = "msm8x16-snd-card";
qcom,msm-snd-card-id = <0>;
qcom,msm-codec-type = "internal";
qcom,audio-routing =
"RX_BIAS", "MCLK",
"INT_LDO_H", "MCLK",
"MIC BIAS External", "Handset Mic",
"MIC BIAS Internal2", "Headset Mic",
"MIC BIAS External", "Secondary Mic",
"AMIC1", "MIC BIAS External",
"AMIC2", "MIC BIAS Internal2",
"AMIC3", "MIC BIAS External";
pinctrl-names = "cdc_pdm_lines_act",
"cdc_pdm_lines_sus";
pinctrl-0 = <&cdc_pdm_lines_act>;
pinctrl-1 = <&cdc_pdm_lines_sus>;
};
qcom,msm-pcm {
compatible = "qcom,msm-pcm-dsp";
qcom,msm-pcm-dsp-id = <0>;
};
qcom,msm-pcm-routing {
compatible = "qcom,msm-pcm-routing";
};
qcom,msm-pcm-low-latency {
compatible = "qcom,msm-pcm-dsp";
qcom,msm-pcm-dsp-id = <1>;
qcom,msm-pcm-low-latency;
};
qcom,msm-pcm-lpa {
compatible = "qcom,msm-pcm-lpa";
};
qcom,msm-compress-dsp {
compatible = "qcom,msm-compress-dsp";
};
qcom,msm-voip-dsp {
compatible = "qcom,msm-voip-dsp";
};
qcom,msm-pcm-voice {
compatible = "qcom,msm-pcm-voice";
};
qcom,msm-stub-codec {
compatible = "qcom,msm-stub-codec";
};
qcom,msm-dai-fe {
compatible = "qcom,msm-dai-fe";
};
qcom,msm-pcm-afe {
compatible = "qcom,msm-pcm-afe";
};
qcom,msm-dai-mi2s {
compatible = "qcom,msm-dai-mi2s";
qcom,msm-dai-q6-mi2s-prim {
compatible = "qcom,msm-dai-q6-mi2s";
qcom,msm-dai-q6-mi2s-dev-id = <0>;
qcom,msm-mi2s-rx-lines = <3>;
qcom,msm-mi2s-tx-lines = <0>;
};
qcom,msm-dai-q6-mi2s-sec {
compatible = "qcom,msm-dai-q6-mi2s";
qcom,msm-dai-q6-mi2s-dev-id = <1>;
qcom,msm-mi2s-rx-lines = <1>;
qcom,msm-mi2s-tx-lines = <0>;
};
qcom,msm-dai-q6-mi2s-tert {
compatible = "qcom,msm-dai-q6-mi2s";
qcom,msm-dai-q6-mi2s-dev-id = <2>;
qcom,msm-mi2s-rx-lines = <0>;
qcom,msm-mi2s-tx-lines = <3>;
};
};
qcom,msm-dai-q6-hdmi {
compatible = "qcom,msm-dai-q6-hdmi";
qcom,msm-dai-q6-dev-id = <8>;
};
qcom,msm-dai-q6 {
compatible = "qcom,msm-dai-q6";
qcom,msm-dai-q6-sb-0-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16384>;
};
qcom,msm-dai-q6-sb-0-tx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16385>;
};
qcom,msm-dai-q6-sb-1-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16386>;
};
qcom,msm-dai-q6-sb-1-tx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16387>;
};
qcom,msm-dai-q6-sb-3-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16390>;
};
qcom,msm-dai-q6-sb-3-tx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16391>;
};
qcom,msm-dai-q6-sb-4-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16392>;
};
qcom,msm-dai-q6-sb-4-tx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16393>;
};
qcom,msm-dai-q6-bt-sco-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <12288>;
};
qcom,msm-dai-q6-bt-sco-tx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <12289>;
};
qcom,msm-dai-q6-int-fm-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <12292>;
};
qcom,msm-dai-q6-int-fm-tx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <12293>;
};
qcom,msm-dai-q6-be-afe-pcm-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <224>;
};
qcom,msm-dai-q6-be-afe-pcm-tx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <225>;
};
qcom,msm-dai-q6-afe-proxy-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <241>;
};
qcom,msm-dai-q6-afe-proxy-tx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <240>;
};
qcom,msm-dai-q6-incall-record-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <32771>;
};
qcom,msm-dai-q6-incall-record-tx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <32772>;
};
qcom,msm-dai-q6-incall-music-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <32773>;
};
qcom,msm-dai-q6-incall-music-2-rx {
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <32770>;
};
};
qcom,msm-pcm-hostless {
compatible = "qcom,msm-pcm-hostless";
};
qcom,msm-pri-auxpcm {
compatible = "qcom,msm-auxpcm-dev";
qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
qcom,msm-cpudai-auxpcm-data = <0>, <0>;
qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
qcom,msm-auxpcm-interface = "primary";
};
qcom,msm-audio-ion {
compatible = "qcom,msm-audio-ion";
};
qcom,smdtty {
compatible = "qcom,smdtty";
smdtty_apps_fm: qcom,smdtty-apps-fm {
qcom,smdtty-remote = "wcnss";
qcom,smdtty-port-name = "APPS_FM";
};
smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl {
qcom,smdtty-remote = "wcnss";
qcom,smdtty-port-name = "APPS_RIVA_BT_ACL";
};
smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd {
qcom,smdtty-remote = "wcnss";
qcom,smdtty-port-name = "APPS_RIVA_BT_CMD";
};
smdtty_mbalbridge: qcom,smdtty-mbalbridge {
qcom,smdtty-remote = "modem";
qcom,smdtty-port-name = "MBALBRIDGE";
};
smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd {
qcom,smdtty-remote = "wcnss";
qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD";
};
smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data {
qcom,smdtty-remote = "wcnss";
qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA";
};
smdtty_data1: qcom,smdtty-data1 {
qcom,smdtty-remote = "modem";
qcom,smdtty-port-name = "DATA1";
};
smdtty_data4: qcom,smdtty-data4 {
qcom,smdtty-remote = "modem";
qcom,smdtty-port-name = "DATA4";
};
smdtty_data11: qcom,smdtty-data11 {
qcom,smdtty-remote = "modem";
qcom,smdtty-port-name = "DATA11";
};
smdtty_data21: qcom,smdtty-data21 {
qcom,smdtty-remote = "modem";
qcom,smdtty-port-name = "DATA21";
};
smdtty_loopback: smdtty-loopback {
qcom,smdtty-remote = "modem";
qcom,smdtty-port-name = "LOOPBACK";
qcom,smdtty-dev-name = "LOOPBACK_TTY";
};
};
qcom,smdpkt {
compatible = "qcom,smdpkt";
qcom,smdpkt-data5-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA5_CNTL";
qcom,smdpkt-dev-name = "smdcntl0";
};
qcom,smdpkt-data6-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA6_CNTL";
qcom,smdpkt-dev-name = "smdcntl1";
};
qcom,smdpkt-data7-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA7_CNTL";
qcom,smdpkt-dev-name = "smdcntl2";
};
qcom,smdpkt-data8-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA8_CNTL";
qcom,smdpkt-dev-name = "smdcntl3";
};
qcom,smdpkt-data9-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA9_CNTL";
qcom,smdpkt-dev-name = "smdcntl4";
};
qcom,smdpkt-data12-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA12_CNTL";
qcom,smdpkt-dev-name = "smdcntl5";
};
qcom,smdpkt-data13-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA13_CNTL";
qcom,smdpkt-dev-name = "smdcntl6";
};
qcom,smdpkt-data14-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA14_CNTL";