Abstract
Chip Multi-Processor(CMP) allows multiple threads to execute simultaneously. Because threads share various resources of CMP, such as L2-Cache, CMP system is inherently different from multiprocessors system and, CMP is also different from simultaneous multithreading (SMT). It could support more than two threads to execute simultaneously, and some executing units are owned by each core. We present hash join optimization based on shared cache CMP. Firstly, we propose multithreaded hash join execution framework based on Radix-Join algorithm, then we analyze the factors which affect performance of multithreaded Radix-Join algorithm in CMP. Basing on this analysis, we optimize the performance of various threads and their shared-cache access performance in the framework, and then theoretic analysis of speedup in multithreaded cluster partition phase is presents which could give some advices to cluster partition thread optimization. All of our algorithms are implemented in EaseDB. In the experiments, we evaluate performance of the multithreaded hash join execution framework, and the results show that our algorithm could effectively resolve cache access conflict and load imbalance in multithreaded environment. Hash join performance is improved.
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Hankins, R.A., Patel, J.M.: Effect of node size on the performance of cache-conscious B+-Tree. In: SIGMETRICS 2003 (2003)
Boncz, P., Manegold, S., Kersten, M.L.: Database architecture optimized for the new bottleneck: Memory Access. In: Proceeding of the 25th VLDB conference, Edinburgh, Scotland (1999)
Song, F., Moore, S., Dongarra, J.: L2 cache modeling for scientific application on chip Multi-Processors. In: Proceedings of the 2007 International Conference on Parallel Processing (2007)
Chen, S., Gibbons, P.B., Kozuch, M.: Scheduling threads for constructive cache sharing on CMPs. In: Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures (2007)
Cieslewicz, J., Ross, K.A., Giannakakis, I.: Parallel buffer for chip multiprocessors. In: DaMoN (2007)
Cieslewicz, J., Ross, K.A.: Adaptive aggregation on chip multiprocessors. In: VLDB 2007 (2007)
Hardavellas, N., Pandis, I., Johnson, R.: Database servers on chip multipr-ocessors limitations and opportunities. In: CIDR 2007 (2007)
He, B., Luo, Q.: Cache-oblivious Database: Limitations and Opportunities. In: TODS 2008 (2008)
Hennessy, J.L., Patterson, D.A.: Computer Architecture, 4th edn. (2007)
He, B., Luo, Q.: Cache-Oblivious hash joins, HKU technical report (2006)
Chen, S., Ailamaki, A., Gibbons, P.B.: Improving Hash Join Performance Through Prefetching. In: ICDE (2004)
Cieslewicz, J., Berry, J., Hendrickson, B., Ross, K.A.: Realizing parallelism in database operations: Insights from a massively multithreaded architecture. In: DaMoN (2006)
Zhou, J., Cieslewicz, J., Ross, K.A., Shah, M.: Improving database performance on simultaneous multithreaded processors. In: VLDB 2005 (2005)
Garcia, P., Korth, h.F.: Pipelined Hash-Join on multithreaded architectures. In: DaMoN (2007)
Garcia, P., Korth, H.F.: Database hash-join algorithms on multithreaded computer architectures. In: Proceedings of the 3rd conference on Computing frontiers, Ischia, Italy, pp. 241–252 (2006)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2009 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Yadan, D., Ning, J., Wei, X., Luo, C., Hongsheng, C. (2009). Hash Join Optimization Based on Shared Cache Chip Multi-processor. In: Zhou, X., Yokota, H., Deng, K., Liu, Q. (eds) Database Systems for Advanced Applications. DASFAA 2009. Lecture Notes in Computer Science, vol 5463. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-00887-0_26
Download citation
DOI: https://doi.org/10.1007/978-3-642-00887-0_26
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-00886-3
Online ISBN: 978-3-642-00887-0
eBook Packages: Computer ScienceComputer Science (R0)