Abstract
In the last decade various soft computing techniques have been developed. They include neural networks, fuzzy systems, evolutionary algorithms, rough sets and others. In many applications it is desirable that soft computing techniques are implemented in parallel VLSI structures based on systolic arrays. In this paper we present the systolic implementations of the UD RLS learning algorithms for feed-forward neural networks and for probabilistic neural networks.
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Bilski, J., Smoląg, J., Żurada, J. (2004). Systolic Architectures for Soft Computing Algorithms. In: Wyrzykowski, R., Dongarra, J., Paprzycki, M., Waśniewski, J. (eds) Parallel Processing and Applied Mathematics. PPAM 2003. Lecture Notes in Computer Science, vol 3019. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-24669-5_79
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DOI: https://doi.org/10.1007/978-3-540-24669-5_79
Publisher Name: Springer, Berlin, Heidelberg
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