Abstract
We present the design-scheme and physical implementation for a Dynamic Adaptive Neural Network Array (DANNA) based upon the work by Schuman and Birdwell [1,2] and using a programmable array of elements constructed with a Field Programmable Gate Array (FPGA). The aim of this paper is to demonstrate how a single programmable neuromorphic element can be designed to support the primary components of a dynamic and adaptive neural network, e.g. a neuron and a synapse, and be replicated across a FPGA to yield a reasonably large programmable DANNA of up to 10,000 neurons and synapses. We describe element programmability, how the dynamic components of a neuron and synapse are supported, and the structure used to support the monitoring and control interface. Finally, we present initial results from simulations of the hardware, the projected performance of the array elements and the physical implementation of a DANNA on a Xilinx FPGA.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Schuman, C.D., Birdwell, J.D.: Variable structure dynamic artificial neural networks. Biologically Inspired Cognitive Architectures 6, 126–130 (2013)
Schuman, C.D., Birdwell, J.D.: Dynamic artificial neural networks with affective systems. PLOS One 8(11) (November 2013)
Hodgkin, A.L., Huxley, A.F.: Propagation of electrical signals along giant nerve fibers. Proceedings of the Royal Society of London, Series B, Biological Sciences, 177–183 (1952)
Rosenblatt, F.: Principles of Neurodynamics. Spartan, Washington, DC (1961)
Dayan, P., Abbott, I.: Theoretical Neuroscience: Computational and Mathematical Modeling of Neural Systems. The MIT Press, Cambridge (2001)
Trappenberg, T.P.: Fundamentals of Computational Neuroscience, 2nd edn. Oxford University Press, New York (2010)
Haykin, S.: Neural Networks: A Comprehensive Foundation. Macmillan College Publishing Company (1994)
Lau, C. (ed.): Neural Networks: Theoretical Foundations and Analysis. IEEE Press (1992)
Kandel, E., Schwartz, J., Jesell, T.: Principles of Neural Science, 4th edn. McGraw-Hill Medical (2000)
Perez-Uribe, A.: Artificial Neural Networks: Algorithms and Hardware Implementation. In: Bio-Inspired Computing Machines: Toward Novel Computational Architectures, pp. 289–316. PPUR Press (1998)
Leiner, B.J., Lorena, V.Q., Cesar, T.M., Lorenzo, M.V.: Hardware architecture for FPGA implementation of a neural network and its application in images processing. In: Proceedings of the 5th Meeting of the Electronics, Robotics and Automotive Mechanics Conference, pp. 405–410 (October 2008)
Saif, S., Abbas, H.M., Nassar, S.M., Wahdan, A.A.: An FPGA implementation of a neural optimization of block truncation coding for image/video compression. Microprocessors and Microsystems 31(8), 477–486 (2007)
Stepanova, M., Lin, F.: A Hopfield Neural Classifier and its FPGA implementation for identification of symmetrically structured DNA Motifs. In: Proceedings of the International Joint Conference on Neural Networks, Orlando, FL (August 2007)
Moradi, S., Imam, N., Manohar, R., Indiveri, G.: A memory-efficient routing method for large-scale spiking neural networks. In: 2013 European Conference on Circuit Theory and Design (ECCTD), pp. 1–4 (September 2013)
Vogelstein, R., Mallik, U., Vogelstein, J., Cauwenberghs, G.: Dynamically recongifurable silicon array of spiking neurons with conductance-based synapses. IEEE Transactionas of Neural Networks 18(1), 253 (2007)
Indiveri, B., Chicca, E., Douglas, R.: A VLSI reconfigurable network of integrate-and-fire neurons with spike-based learning synapses. In: ESAN 2004, pp. 405–410 (2004)
Graas, E., Brown, E., Lee, R.: An FPGA-based approach to high-speed simulation of conductance-based neuron models. NeuroInformatics 2(4), 417–435 (2004)
Pearson, M., Gilhespy, I., Gurney, K., Melhuish, C., Mitchinson, B., Nibouche, M., Pipe, A.: A real-time, FPGA based, biologically plausible neural network processor. In: Duch, W., Kacprzyk, J., Oja, E., Zadrożny, S. (eds.) ICANN 2005. LNCS, vol. 3697, pp. 1021–1026. Springer, Heidelberg (2005)
Cassidy, A., Denham, S., Kanold, P., Andreou, A.: FPGA based silicon spiking neural array. In: Proceedings of the Biomedical Circuits and Systems Conference, Montreal, Que, pp. 75–78 (2007)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2014 Springer International Publishing Switzerland
About this paper
Cite this paper
Dean, M.E., Schuman, C.D., Birdwell, J.D. (2014). Dynamic Adaptive Neural Network Array. In: Ibarra, O., Kari, L., Kopecki, S. (eds) Unconventional Computation and Natural Computation. UCNC 2014. Lecture Notes in Computer Science(), vol 8553. Springer, Cham. https://doi.org/10.1007/978-3-319-08123-6_11
Download citation
DOI: https://doi.org/10.1007/978-3-319-08123-6_11
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-08122-9
Online ISBN: 978-3-319-08123-6
eBook Packages: Computer ScienceComputer Science (R0)