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ORCIDPrabhat Mishra 0001
Person information
- affiliation: University of Florida, Gainesville, USA
Other persons with the same name
- Prabhat Mishra 0002 — Samsung R&D Institute, Bangalore, India
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2020 – today
- 2025
[j84]Zhixin Pan
, Prabhat Mishra:
AI Trojan Attack for Evading Machine Learning-Based Detection of Hardware Trojans. IEEE Trans. Computers 74(3): 860-874 (2025)- [j83]Aruna Jayasena, Richard Bachmann, Prabhat Mishra:
CiseLeaks: Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes. IEEE Trans. Inf. Forensics Secur. 20: 1551-1565 (2025) - 2024
- [j82]Aruna Jayasena, Prabhat Mishra:
Directed Test Generation for Hardware Validation: A Survey. ACM Comput. Surv. 56(5): 132:1-132:36 (2024) - [j81]Hansika Weerasena, Prabhat Mishra:
Breaking On-Chip Communication Anonymity Using Flow Correlation Attacks. ACM J. Emerg. Technol. Comput. Syst. 20(4): 12:1-12:27 (2024) - [j80]Zhixin Pan, Prabhat Mishra:
TD-Zero: Automatic Golden-Free Hardware Trojan Detection Using Zero-Shot Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 1998-2011 (2024) - [j79]Aruna Jayasena, Prabhat Mishra:
HIVE: Scalable Hardware-Firmware Co-Verification Using Scenario-Based Decomposition and Automated Hint Extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 3278-3291 (2024) - [j78]Hasini Witharana, Hansika Weerasena, Prabhat Mishra:
Formal Verification of Virtualization-Based Trusted Execution Environments. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(11): 4262-4273 (2024) - [j77]Hansika Weerasena, Prabhat Mishra:
Revealing CNN Architectures via Side-Channel Analysis in Dataflow-based Inference Accelerators. ACM Trans. Embed. Comput. Syst. 23(6): 100:1-100:25 (2024) - [j76]Hansika Weerasena, Prabhat Mishra:
Security of Electrical, Optical, and Wireless On-chip Interconnects: A Survey. ACM Trans. Design Autom. Electr. Syst. 29(2): 40:1-40:41 (2024) - [j75]Hasini Witharana, Aruna Jayasena, Prabhat Mishra:
Incremental Concolic Testing of Register-Transfer Level Designs. ACM Trans. Design Autom. Electr. Syst. 29(3): 55:1-55:23 (2024) - [j74]Sahan Sanjaya, Hasini Witharana, Prabhat Mishra:
Assertion-Based Validation using Clustering and Dynamic Refinement of Hardware Checkers. ACM Trans. Design Autom. Electr. Syst. 29(6): 1-22 (2024) - [c139]Hasini Witharana, Daniel Volya, Prabhat Mishra:
QcAssert: Quantum Device Testing with Concurrent Assertions. ASPDAC 2024: 491-496 - [c138]Aruna Jayasena, Richard Bachmann, Prabhat Mishra:
EvilCS: An Evaluation of Information Leakage through Context Switching on Security Enclaves. DATE 2024: 1-6 - [c137]Hasini Witharana, Debapriya Chatterjee, Prabhat Mishra:
Verifying Memory Confidentiality and Integrity of Intel TDX Trusted Execution Environments. HOST 2024: 44-54 - [c136]Hansika Weerasena, Prabhat Mishra:
Lightweight Multicast Authentication in NoC-based SoCs. ISQED 2024: 1-8 - [c135]Sahan Sanjaya, Daniel Volya, Prabhat Mishra:
Variational Quantum Algorithms via Measurement-Induced Passive Steering. QCE 2024: 481-487 - [c134]Daniel Volya, Andrey Nikitin, Prabhat Mishra:
Fast Quantum Characterization via Riemannian Optimization. QCE 2024: 1270-1276 - [c133]Daniel Volya, Prabhat Mishra:
Quantum Benchmarking via Random Dynamical Quantum Maps. QCE 2024: 1277-1283 - [c132]Aruna Jayasena, Prabhat Mishra:
Design for Trust Utilizing Rareness Reduction. VLSID 2024: 437-442 - [i22]Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra:
Information Leakage through Physical Layer Supply Voltage Coupling Vulnerability. CoRR abs/2403.08132 (2024) - [i21]Zhixin Pan, Emma Andrews, Laura Chang, Prabhat Mishra:
Privacy-Preserving Debiasing using Data Augmentation and Machine Unlearning. CoRR abs/2404.13194 (2024) - [i20]Daniel Volya, Andrey Nikitin, Prabhat Mishra:
Fast Quantum Process Tomography via Riemannian Gradient Descent. CoRR abs/2404.18840 (2024) - [i19]Emma Andrews, Prabhat Mishra:
Explainable Metric Learning for Deflating Data Bias. CoRR abs/2407.04866 (2024) - [i18]Aruna Jayasena, Richard Bachmann, Prabhat Mishra:
CISELeaks: Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes. IACR Cryptol. ePrint Arch. 2024: 932 (2024) - 2023
- [j73]Hasini Witharana, Aruna Jayasena, Andrew Whigham, Prabhat Mishra:
Automated Generation of Security Assertions for RTL Models. ACM J. Emerg. Technol. Comput. Syst. 19(1): 8:1-8:27 (2023) - [j72]Aruna Jayasena, Prabhat Mishra:
Scalable Detection of Hardware Trojans Using ATPG-Based Activation of Rare Events. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4450-4462 (2023) - [j71]Aruna Jayasena, Emma Andrews, Prabhat Mishra:
TVLA*: Test Vector Leakage Assessment on Hardware Implementations of Asymmetric Cryptography Algorithms. IEEE Trans. Very Large Scale Integr. Syst. 31(9): 1269-1279 (2023) - [j70]Meenu Rani Dey, Moumita Patra, Prabhat Mishra:
Efficient Detection and Localization of DoS Attacks in Heterogeneous Vehicular Networks. IEEE Trans. Veh. Technol. 72(5): 5597-5611 (2023) - [c131]Daniel Volya, Prabhat Mishra:
Quantum Data Compression for Efficient Generation of Control Pulses. ASP-DAC 2023: 216-221 - [c130]Zhixin Pan, Prabhat Mishra:
Hardware Trojan Detection Using Shapley Ensemble Boosting. ASP-DAC 2023: 496-503 - [c129]Zachery Utt, Daniel Volya, Prabhat Mishra:
Quantum Measurement Discrimination using Cumulative Distribution Functions. DATE 2023: 1-6 - [c128]Hasini Witharana, Sahan Sanjaya, Prabhat Mishra:
Dynamic Refinement of Hardware Assertion Checkers. DATE 2023: 1-6 - [c127]Daniel Volya, Tao Zhang, Nashmin Alam, Mark M. Tehranipoor, Prabhat Mishra:
Towards Secure Classical-Quantum Systems. HOST 2023: 283-292 - [c126]Daniel Volya, Zhixin Pan, Prabhat Mishra:
Feedback-Based Steering for Quantum State Preparation. QCE 2023: 1308-1318 - [c125]Daniel Volya, Prabhat Mishra:
Quantum Steering of Surface Error Correcting Codes. QCE 2023: 1394-1400 - [i17]Hansika Weerasena, Prabhat Mishra:
Security of Electrical, Optical and Wireless On-Chip Interconnects: A Survey. CoRR abs/2301.09738 (2023) - [i16]Subodha Charles, Prabhat Mishra:
Lightweight Encryption and Anonymous Routing in NoC based SoCs. CoRR abs/2302.06118 (2023) - [i15]Aruna Jayasena, Prabhat Mishra:
DETER: Design for Trust utilizing Rareness Reduction. CoRR abs/2302.08984 (2023) - [i14]Hasini Witharana, Aruna Jayasena, Prabhat Mishra:
Sequence-Based Incremental Concolic Testing of RTL Models. CoRR abs/2302.12241 (2023) - [i13]Hasini Witharana, Daniel Volya, Prabhat Mishra:
quAssert: Automatic Generation of Quantum Assertions. CoRR abs/2303.01487 (2023) - [i12]Khushboo Rani, Hansika Weerasena, Stephen A. Butler, Subodha Charles, Prabhat Mishra:
Modeling and Exploration of Gain Competition Attacks in Optical Network-on-Chip Architectures. CoRR abs/2303.01550 (2023) - [i11]Zhixin Pan, Prabhat Mishra:
Hardware Acceleration of Explainable Artificial Intelligence. CoRR abs/2305.04887 (2023) - [i10]Aruna Jayasena, Prabhat Mishra:
HIVE: Scalable Hardware-Firmware Co-Verification using Scenario-based Decomposition and Automated Hint Extraction. CoRR abs/2309.08002 (2023) - [i9]Yuntao Liu, Aruna Jayasena, Prabhat Mishra, Ankur Srivastava:
Logic Locking based Trojans: A Friend Turns Foe. CoRR abs/2309.15067 (2023) - [i8]Hansika Weerasena, Zhixin Pan, Khushboo Rani, Prabhat Mishra:
Breaking NoC Anonymity using Flow Correlation Attack. CoRR abs/2309.15687 (2023) - [i7]Hansika Weerasena, Prabhat Mishra:
Revealing CNN Architectures via Side-Channel Analysis in Dataflow-based Inference Accelerators. CoRR abs/2311.00579 (2023) - [i6]Daniel Volya, Prabhat Mishra:
QudCom: Towards Quantum Compilation for Qudit Systems. CoRR abs/2311.07015 (2023) - 2022
- [j69]Zhixin Pan, Prabhat Mishra:
A Survey on Hardware Vulnerability Analysis Using Machine Learning. IEEE Access 10: 49508-49527 (2022) - [j68]Subodha Charles, Prabhat Mishra:
A Survey of Network-on-Chip Security Attacks and Countermeasures. ACM Comput. Surv. 54(5): 101:1-101:36 (2022) - [j67]Hasini Witharana, Yangdi Lyu, Subodha Charles, Prabhat Mishra:
A Survey on Assertion-based Hardware Verification. ACM Comput. Surv. 54(11s): 225:1-225:33 (2022) - [j66]Chamika Sudusinghe, Subodha Charles, Sapumal Ahangama, Prabhat Mishra:
Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures. IEEE Des. Test 39(6): 28-38 (2022) - [j65]Priyanka Panigrahi, Vemuri Sahithya, Chandan Karfa, Prabhat Mishra:
Secure Register Allocation for Trusted Code Generation. IEEE Embed. Syst. Lett. 14(3): 127-130 (2022) - [j64]Aruna Jayasena, Binod Kumar, Subodha Charles, Hasini Witharana, Prabhat Mishra:
Network-on-Chip Trust Validation Using Security Assertions. J. Hardw. Syst. Secur. 6(3-4): 79-94 (2022) - [j63]Zhixin Pan, Jennifer Sheldon, Prabhat Mishra:
Hardware-Assisted Malware Detection and Localization Using Explainable Machine Learning. IEEE Trans. Computers 71(12): 3308-3321 (2022) - [j62]Aisharjya Sarkar, Prabhat Mishra, Tamer Kahveci:
Data Perturbation and Recovery of Time Series Gene Expression Data. IEEE ACM Trans. Comput. Biol. Bioinform. 19(2): 830-842 (2022) - [j61]Subodha Charles, Vincent Bindschaedler, Prabhat Mishra:
Digital Watermarking for Detecting Malicious Intellectual Property Cores in NoC Architectures. IEEE Trans. Very Large Scale Integr. Syst. 30(7): 952-965 (2022) - [c124]Zhixin Pan, Prabhat Mishra:
Design of AI Trojans for Evading Machine Learning-based Detection of Hardware Trojans. DATE 2022: 682-687 - [c123]Zhixin Pan, Prabhat Mishra:
Hardware Acceleration of Explainable Machine Learning. DATE 2022: 1127-1130 - [c122]Hasini Witharana, Prabhat Mishra:
Speculative Load Forwarding Attack on Modern Processors. ICCAD 2022: 144:1-144:9 - [c121]Daniel Volya, Prabhat Mishra:
Modeling of Noisy Quantum Circuits using Random Matrix Theory. ICCD 2022: 132-138 - [c120]Aruna Jayasena, Khushboo Rani, Prabhat Mishra:
Efficient Finite State Machine Encoding for Defending Against Laser Fault Injection Attacks. ICCD 2022: 247-254 - [i5]Zhixin Pan, Prabhat Mishra:
Backdoor Attacks on Bayesian Neural Networks using Reverse Distribution. CoRR abs/2205.09167 (2022) - 2021
- [j60]Yangdi Lyu, Prabhat Mishra:
Scalable Concolic Testing of RTL Models. IEEE Trans. Computers 70(7): 979-991 (2021) - [j59]Yangdi Lyu, Prabhat Mishra:
Scalable Activation of Rare Triggers in Hardware Trojans by Repeated Maximal Clique Sampling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(7): 1287-1300 (2021) - [j58]Yangdi Lyu, Prabhat Mishra:
MaxSense: Side-channel Sensitivity Maximization for Trojan Detection Using Statistical Test Patterns. ACM Trans. Design Autom. Electr. Syst. 26(3): 22:1-22:21 (2021) - [j57]Hasini Witharana, Yangdi Lyu, Prabhat Mishra:
Directed Test Generation for Activation of Security Assertions in RTL Models. ACM Trans. Design Autom. Electr. Syst. 26(4): 26:1-26:28 (2021) - [j56]Abhijit Das, John Jose, Prabhat Mishra:
Data Criticality in Multithreaded Applications: An Insight for Many-Core Systems. IEEE Trans. Very Large Scale Integr. Syst. 29(9): 1675-1679 (2021) - [c119]Zhixin Pan, Prabhat Mishra:
Automated Test Generation for Hardware Trojan Detection using Reinforcement Learning. ASP-DAC 2021: 408-413 - [c118]Daniel Volya, Prabhat Mishra:
Quantum Spectral Clustering of Mixed Graphs. DAC 2021: 463-468 - [c117]Meenu Rani Dey, Moumita Patra, Prabhat Mishra:
Real-Time Detection and Localization of Denial-of-Service Attacks in Heterogeneous Vehicular Networks. DATE 2021: 1434-1439 - [c116]Zhixin Pan, Jennifer Sheldon, Chamika Sudusinghe, Subodha Charles, Prabhat Mishra:
Hardware-Assisted Malware Detection using Machine Learning. DATE 2021: 1775-1780 - [c115]Zhixin Pan, Prabhat Mishra:
Automated Detection of Spectre and Meltdown Attacks Using Explainable Machine Learning. HOST 2021: 24-34 - [c114]Hansika Weerasena, Subodha Charles, Prabhat Mishra:
Lightweight Encryption Using Chaffing and Winnowing with All-or-Nothing Transform for Network-on-Chip Architectures. HOST 2021: 170-180 - [c113]Zhixin Pan, Prabhat Mishra:
Accelerating Spectral Normalization for Enhancing Robustness of Deep Neural Networks. ISVLSI 2021: 260-265 - [c112]Chamika Sudusinghe, Subodha Charles, Prabhat Mishra:
Denial-of-service attack detection using machine learning in network-on-chip architectures. NOCS 2021: 35-40 - [i4]Abhijit Das, John Jose, Prabhat Mishra:
Data Criticality in Multi-Threaded Applications: An Insight for Many-Core Systems. CoRR abs/2101.00055 (2021) - [i3]Zhixin Pan, Prabhat Mishra:
Hardware Acceleration of Explainable Machine Learning using Tensor Processing Units. CoRR abs/2103.11927 (2021) - [i2]Zhixin Pan, Prabhat Mishra:
Fast Approximate Spectral Normalization for Robust Deep Neural Networks. CoRR abs/2103.13815 (2021) - 2020
- [j55]Subodha Charles, Yangdi Lyu, Prabhat Mishra:
Real-Time Detection and Localization of Distributed DoS Attacks in NoC-Based SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4510-4523 (2020) - [j54]Kamran Rahmani, Prabhat Mishra:
Feature-Based Signal Selection for Post-Silicon Debug Using Machine Learning. IEEE Trans. Emerg. Top. Comput. 8(4): 907-915 (2020) - [j53]Subodha Charles, Prabhat Mishra:
Reconfigurable Network-on-Chip Security Architecture. ACM Trans. Design Autom. Electr. Syst. 25(6): 53:1-53:25 (2020) - [c111]Yangdi Lyu, Prabhat Mishra:
Automated Test Generation for Activation of Assertions in RTL Models. ASP-DAC 2020: 223-228 - [c110]Yangdi Lyu, Prabhat Mishra:
Automated Trigger Activation by Repeated Maximal Clique Sampling. ASP-DAC 2020: 482-487 - [c109]Subodha Charles, Megan Logan, Prabhat Mishra:
Lightweight Anonymous Routing in NoC based SoCs. DATE 2020: 334-337 - [c108]Yangdi Lyu, Prabhat Mishra:
Automated Test Generation for Trojan Detection using Delay-based Side Channel Analysis. DATE 2020: 1031-1036 - [c107]Zhixin Pan, Jennifer Sheldon, Prabhat Mishra:
Test Generation using Reinforcement Learning for Delay-based Side-Channel Analysis. ICCAD 2020: 109:1-109:7 - [c106]Daniel Volya, Prabhat Mishra:
Special Session: Impact of Noise on Quantum Algorithms in Noisy Intermediate-Scale Quantum Systems. ICCD 2020: 1-4 - [c105]Zhixin Pan, Jennifer Sheldon, Prabhat Mishra:
Hardware-Assisted Malware Detection using Explainable Machine Learning. ICCD 2020: 663-666 - [c104]Yuanwen Huang, Prabhat Mishra:
Vulnerability-aware Dynamic Reconfiguration of Partially Protected Caches. ISQED 2020: 255-260 - [c103]Subodha Charles, Prabhat Mishra:
Lightweight and Trust-Aware Routing in NoC-Based SoCs. ISVLSI 2020: 160-167 - [c102]Subodha Charles, Prabhat Mishra:
Securing Network-on-Chip Using Incremental Cryptography. ISVLSI 2020: 168-175 - [c101]Manju Rajan, Abhijit Das, John Jose, Prabhat Mishra:
SECTAR: Secure NoC using Trojan Aware Routing. NOCS 2020: 1-8 - [i1]Yangdi Lyu, Prabhat Mishra:
System-on-Chip Security Assertions. CoRR abs/2001.06719 (2020)
2010 – 2019
- 2019
- [j52]Farimah Farahmandi, Prabhat Mishra:
Automated Test Generation for Debugging Multiple Bugs in Arithmetic Circuits. IEEE Trans. Computers 68(2): 182-197 (2019) - [j51]Yangdi Lyu, Xiaoke Qin, Mingsong Chen, Prabhat Mishra:
Directed Test Generation for Validation of Cache Coherence Protocols. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(1): 163-176 (2019) - [j50]Yuanwen Huang, Prabhat Mishra:
Vulnerability-Aware Energy Optimization for Reconfigurable Caches in Multitasking Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(5): 809-821 (2019) - [j49]Adib Nahiyan, Farimah Farahmandi, Prabhat Mishra, Domenic Forte, Mark M. Tehranipoor:
Security-Aware FSM Design Flow for Identifying and Mitigating Vulnerabilities to Fault Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(6): 1003-1016 (2019) - [j48]Alif Ahmed, Yuanwen Huang, Prabhat Mishra:
Cache Reconfiguration Using Machine Learning for Vulnerability-aware Energy Optimization. ACM Trans. Embed. Comput. Syst. 18(2): 15:1-15:24 (2019) - [j47]Subodha Charles, Alif Ahmed, Ümit Y. Ogras, Prabhat Mishra:
Efficient Cache Reconfiguration Using Machine Learning in NoC-Based Many-Core CMPs. ACM Trans. Design Autom. Electr. Syst. 24(6): 60:1-60:23 (2019) - [j46]Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber:
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 253-280 (2019) - [j45]Prabhat Mishra, Debdeep Mukhopadhyay, Swarup Bhunia:
Guest Editorial: Special Section on Autonomous Intelligence for Security and Privacy Analytics. IEEE Trans. Very Large Scale Integr. Syst. 27(12): 2703-2705 (2019) - [c100]Jonathan Cruz, Prabhat Mishra, Swarup Bhunia:
The Metric Matters: The Art of Measuring Trust in Electronics. DAC 2019: 222 - [c99]Yangdi Lyu, Alif Ahmed, Prabhat Mishra:
Automated Activation of Multiple Targets in RTL Models using Concolic Testing. DATE 2019: 354-359 - [c98]Yangdi Lyu, Prabhat Mishra:
Efficient Test Generation for Trojan Detection using Side Channel Analysis. DATE 2019: 408-413 - [c97]Subodha Charles, Yangdi Lyu, Prabhat Mishra:
Real-time Detection and Localization of DoS Attacks in NoC based SoCs. DATE 2019: 1160-1165 - [p1]Alif Ahmed, Farimah Farahmandi, Yousef Iskander, Prabhat Mishra:
Security and Trust Verification of IoT SoCs. Security and Fault Tolerance in Internet of Things 2019: 1-19 - 2018
- [j44]Yangdi Lyu, Prabhat Mishra:
A Survey of Side-Channel Attacks on Caches and Countermeasures. J. Hardw. Syst. Secur. 2(1): 33-50 (2018) - [j43]Yuanwen Huang, Swarup Bhunia, Prabhat Mishra:
Scalable Test Generation for Trojan Detection Using Side Channel Analysis. IEEE Trans. Inf. Forensics Secur. 13(11): 2746-2760 (2018) - [c96]Alif Ahmed, Farimah Farahmandi, Prabhat Mishra:
Directed test generation using concolic testing on RTL models. DATE 2018: 1538-1543 - [c95]Jonathan Cruz, Yuanwen Huang, Prabhat Mishra, Swarup Bhunia:
An automated configurable Trojan insertion framework for dynamic trust benchmarks. DATE 2018: 1598-1603 - [c94]Subodha Charles, Hadi Hajimiri, Prabhat Mishra:
Proactive Thermal Management using Memory-based Computing in Multicore Architectures. IGSC 2018: 1-8 - [c93]Alif Ahmed, Farimah Farahmandi, Yousef Iskander, Prabhat Mishra:
Scalable Hardware Trojan Activation by Interleaving Concrete Simulation and Symbolic Execution. ITC 2018: 1-10 - [c92]Subodha Charles, Chetan Arvind Patil, Ümit Y. Ogras, Prabhat Mishra:
Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs. NOCS 2018: 2:1-2:8 - [c91]Jonathan Cruz, Farimah Farahmandi, Alif Ahmed, Prabhat Mishra:
Hardware Trojan Detection Using ATPG and Model Checking. VLSID 2018: 91-96 - 2017
- [j42]Prabhat Mishra, Ronny Morad, Avi Ziv, Sandip Ray:
Post-Silicon Validation in the SoC Era: A Tutorial Introduction. IEEE Des. Test 34(3): 68-92 (2017) - [j41]Yuanwen Huang, Prabhat Mishra:
Trace Buffer Attack on the AES Cipher. J. Hardw. Syst. Secur. 1(1): 68-84 (2017) - [j40]Ujjwal Gupta, Chetan Arvind Patil, Ganapati Bhat, Prabhat Mishra, Ümit Y. Ogras:
DyPO: Dynamic Pareto-Optimal Configuration Selection for Heterogeneous MpSoCs. ACM Trans. Embed. Comput. Syst. 16(5s): 123:1-123:20 (2017) - [j39]Krishnendu Chakrabarty, Massimo Alioto, Bevan M. Baas, Chirn Chye Boon, Meng-Fan Chang, Naehyuck Chang, Yao-Wen Chang, Chip-Hong Chang, Shih-Chieh Chang, Poki Chen, Masud H. Chowdhury, Pasquale Corsonello, Ibrahim Abe M. Elfadel, Said Hamdioui, Masanori Hashimoto, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Rajiv V. Joshi, Tanay Karnik, Mehran Mozaffari Kermani, Chulwoo Kim, Tae-Hyoung Kim, Jaydeep P. Kulkarni, Eren Kursun, Erik Larsson, Hai (Helen) Li, Huawei Li, Patrick P. Mercier, Prabhat Mishra, Makoto Nagata, Arun S. Natarajan, Koji Nii, Partha Pratim Pande, Ioannis Savidis, Mingoo Seok, Sheldon X.-D. Tan, Mark M. Tehranipoor, Aida Todri-Sanial, Miroslav N. Velev, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Stacey Weber Jackson:
Editorial. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 1-20 (2017) - [j38]Kamran Rahmani, Sandip Ray, Prabhat Mishra:
Postsilicon Trace Signal Selection Using Machine Learning Techniques. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 570-580 (2017) - [j37]Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin:
Automatic Code Converter Enhanced PCH Framework for SoC Trust Verification. IEEE Trans. Very Large Scale Integr. Syst. 25(12): 3390-3400 (2017) - [c90]Farimah Farahmandi, Yuanwen Huang, Prabhat Mishra:
Trojan localization using symbolic algebra. ASP-DAC 2017: 591-597 - [c89]Farimah Farahmandi, Ronny Morad, Avi Ziv, Ziv Nevo, Prabhat Mishra:
Cost-effective analysis of post-silicon functional coverage events. DATE 2017: 392-397 - [c88]Alif Ahmed, Prabhat Mishra:
QUEBS: Qualifying Event Based Search in Concolic Testing for Validation of RTL Models. ICCD 2017: 185-192 - [c87]Farimah Farahmandi, Prabhat Mishra:
Automated Debugging of Arithmetic Circuits Using Incremental Gröbner Basis Reduction. ICCD 2017: 193-200 - [c86]Yuanwen Huang, Prabhat Mishra:
Vulnerability-Aware Energy Optimization Using Reconfigurable Caches in Multicore Systems. ICCD 2017: 241-248 - [c85]Farimah Farahmandi, Prabhat Mishra:
FSM Anomaly Detection Using Formal Analysis. ICCD 2017: 313-320 - 2016
- [j36]Mingsong Chen, Xinqian Zhang, Geguang Pu, Xin Fu, Prabhat Mishra:
Efficient Resource Constrained Scheduling Using Parallel Structure-Aware Pruning Techniques. IEEE Trans. Computers 65(7): 2059-2073 (2016) - [j35]Kamran Rahmani, Sudhi Proch, Prabhat Mishra:
Efficient Selection of Trace and Scan Signals for Post-Silicon Debug. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 313-323 (2016) - [c84]Yuanwen Huang, Swarup Bhunia, Prabhat Mishra:
MERS: Statistical Test Generation for Side-Channel Analysis based Trojan Detection. CCS 2016: 130-141 - [c83]Farimah Farahmandi, Prabhat Mishra:
Automated test generation for Debugging arithmetic circuits. DATE 2016: 1351-1356 - [c82]Farimah Farahmandi, Prabhat Mishra, Sandip Ray:
Exploiting transaction level models for observability-aware post-silicon test generation. DATE 2016: 1477-1480 - [c81]Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin:
Scalable SoC trust verification using integrated theorem proving and model checking. HOST 2016: 124-129 - [c80]Yuanwen Huang, Prabhat Mishra:
Reliability and energy-aware cache reconfiguration for embedded systems. ISQED 2016: 313-318 - [c79]Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin:
Automatic RTL-to-Formal Code Converter for IP Security Formal Verification. MTV 2016: 35-38 - [c78]Sudhi Proch, Prabhat Mishra:
Test Generation for Hybrid Systems Using Clustering and Learning Techniques. VLSID 2016: 589-590 - 2015
- [c77]Xiaolong Guo, Raj Gautam Dutta, Yier Jin, Farimah Farahmandi, Prabhat Mishra:
Pre-silicon security verification and validation: a formal perspective. DAC 2015: 145:1-145:6 - [c76]Mingsong Chen, Daian Yue, Xiaoke Qin, Xin Fu, Prabhat Mishra:
Variation-aware evaluation of MPSoC task allocation and scheduling strategies using statistical model checking. DATE 2015: 199-204 - [c75]Yuanwen Huang, Anupam Chattopadhyay, Prabhat Mishra:
Trace Buffer Attack: Security versus observability study in post-silicon debug. VLSI-SoC 2015: 355-360 - [c74]Prabhat Mishra, Swarup Bhunia, Srivaths Ravi:
Tutorial T2: Validation and Debug of Security and Trust Issues in Embedded Systems. VLSID 2015: 3-5 - [c73]Hadi Hajimiri, Kamran Rahmani, Prabhat Mishra:
Efficient Peak Power Estimation Using Probabilistic Cost-Benefit Analysis. VLSID 2015: 369-374 - 2014
- [j34]Mingsong Chen, Xiaoke Qin, Prabhat Mishra:
Learning-oriented Property Decomposition for Automated Generation of Directed Tests. J. Electron. Test. 30(3): 287-306 (2014) - [c72]Kamran Rahmani, Prabhat Mishra, Sandip Ray:
Efficient trace signal selection using augmentation and ILP techniques. ISQED 2014: 148-155 - [c71]Sudhi Proch, Prabhat Mishra:
Directed test generation for hybrid systems. ISQED 2014: 156-162 - [c70]Prateek Thakyal, Prabhat Mishra:
Layout-Aware Selection of Trace Signals for Post-Silicon Debug. ISVLSI 2014: 326-331 - [c69]Prateek Thakyal, Prabhat Mishra:
Layout-aware signal selection in reconfigurable architectures. VDAT 2014: 1-6 - [c68]Xiaoke Qin, Prabhat Mishra:
Scalable Test Generation by Interleaving Concrete and Symbolic Execution. VLSID 2014: 104-109 - [c67]Xiaoke Qin, Prabhat Mishra:
TECS: Temperature- and Energy-Constrained Scheduling for Multicore Systems. VLSID 2014: 216-221 - 2013
- [j33]Kanad Basu, Chetan Murthy, Prabhat Mishra:
Bitmask aware compression of NISC control words. Integr. 46(2): 131-141 (2013) - [j32]Kanad Basu, Prabhat Mishra:
RATS: Restoration-Aware Trace Signal Selection for Post-Silicon Validation. IEEE Trans. Very Large Scale Integr. Syst. 21(4): 605-613 (2013) - [c66]Kamran Rahmani, Prabhat Mishra, Sandip Ray:
Scalable trace signal selection using machine learning. ICCD 2013: 384-389 - [c65]Mingsong Chen, Saijie Huang, Geguang Pu, Prabhat Mishra:
Branch-and-bound style resource constrained scheduling using efficient structure-aware pruning. ISVLSI 2013: 224-229 - [c64]Kanad Basu, Prabhat Mishra, Priyadarsan Patra, Amir Nahir, Allon Adir:
Dynamic Selection of Trace Signals for Post-Silicon Debug. MTV 2013: 62-67 - [c63]Hadi Hajimiri, Prabhat Mishra, Swarup Bhunia, Branden Long, Yibo Li, Rashmi Jha:
Content-aware encoding for improving energy efficiency in multi-level cell resistive random access memory. NANOARCH 2013: 76-81 - [c62]Hadi Hajimiri, Mimonah Al Qathrady, Prabhat Mishra:
Proactive thermal management using memory based computing. NANOARCH 2013: 110-115 - [c61]Hadi Hajimiri, Prabhat Mishra, Swarup Bhunia:
Dynamic Cache Tuning for Efficient Memory Based Computing in Multicore Architectures. VLSI Design 2013: 49-54 - [c60]Kanad Basu, Prabhat Mishra, Priyadarsan Patra:
Observability-aware Directed Test Generation for Soft Errors and Crosstalk Faults. VLSI Design 2013: 291-296 - [c59]Mingsong Chen, Prabhat Mishra:
Assertion-Based Functional Consistency Checking between TLM and RTL Models. VLSI Design 2013: 320-325 - [c58]Prabhat Mishra, Masahiro Fujita, Virendra Singh, Nagesh Tamarapalli, Sharad Kumar, Rajesh Mittal:
Tutorial T10: Post - Silicon Validation, Debug and Diagnosis. VLSI Design 2013 - [c57]Kamran Rahmani, Prabhat Mishra:
Efficient Signal Selection Using Fine-grained Combination of Scan and Trace Buffers. VLSI Design 2013: 308-313 - 2012
- [j31]Hadi Hajimiri, Kamran Rahmani, Prabhat Mishra:
Compression-aware dynamic cache reconfiguration for embedded systems. Sustain. Comput. Informatics Syst. 2(2): 71-80 (2012) - [j30]Weixun Wang, Sanjay Ranka, Prabhat Mishra:
Energy-aware dynamic slack allocation for real-time multitasking systems. Sustain. Comput. Informatics Syst. 2(3): 128-137 (2012) - [j29]Xiaoke Qin, Weixun Wang, Prabhat Mishra:
TCEC: Temperature and Energy-Constrained Scheduling in Real-Time Multitasking Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1159-1168 (2012) - [j28]Weixun Wang, Prabhat Mishra, Ann Gordon-Ross:
Dynamic Cache Reconfiguration for Soft Real-Time Systems. ACM Trans. Embed. Comput. Syst. 11(2): 28:1-28:31 (2012) - [j27]Mingsong Chen, Prabhat Mishra, Dhrubajyoti Kalita:
Automatic RTL Test Generation from SystemC TLM Specifications. ACM Trans. Embed. Comput. Syst. 11(2): 38:1-38:25 (2012) - [j26]Xiaoke Qin, Prabhat Mishra:
Directed test generation for validation of multicore architectures. ACM Trans. Design Autom. Electr. Syst. 17(3): 24:1-24:21 (2012) - [j25]Weixun Wang, Prabhat Mishra:
System-Wide Leakage-Aware Energy Minimization Using Dynamic Voltage Scaling and Cache Reconfiguration in Multitasking Systems. IEEE Trans. Very Large Scale Integr. Syst. 20(5): 902-910 (2012) - [c56]Xiaoke Qin, Prabhat Mishra:
Automated generation of directed tests for transition coverage in cache coherence protocols. DATE 2012: 3-8 - [c55]Kamran Rahmani, Prabhat Mishra, Swarup Bhunia:
Memory-based computing for performance and energy improvement in multicore architectures. ACM Great Lakes Symposium on VLSI 2012: 287-290 - [c54]Kamran Rahmani, Hadi Hajimiri, Kartik Shrivastava, Prabhat Mishra:
Synergistic integration of code encryption and compression in embedded systems. ACM Great Lakes Symposium on VLSI 2012: 363-368 - [c53]Kanad Basu, Prabhat Mishra, Priyadarsan Patra:
Constrained signal selection for post-silicon validation. HLDVT 2012: 71-75 - [c52]Zhe Wang, Sanjay Ranka, Prabhat Mishra:
Temperature-aware Task Partitioning for Real-Time Scheduling in Embedded Systems. VLSI Design 2012: 161-166 - [c51]Hadi Hajimiri, Prabhat Mishra:
Intra-Task Dynamic Cache Reconfiguration. VLSI Design 2012: 430-435 - [r1]Weixun Wang, Xiaoke Qin, Prabhat Mishra:
Energy-Aware Scheduling and Dynamic Reconfiguration in Real-Time Systems. Handbook of Energy-Aware and Green Computing 2012: 543-572 - 2011
- [j24]Prabhat Mishra, Zeljko Zilic, Sandeep K. Shukla:
Guest Editors' Introduction: Multicore SoC Validation with Transaction-Level Models. IEEE Des. Test Comput. 28(3): 6-9 (2011) - [j23]Zeljko Zilic, Prabhat Mishra, Sandeep K. Shukla:
Challenges of Rapidly Emerging Consumer Space Multiprocessors. IEEE Des. Test Comput. 28(3): 52-53 (2011) - [j22]Sandeep K. Shukla, Prabhat Mishra, Zeljko Zilic:
A Brief History of Multiprocessors and EDA. IEEE Des. Test Comput. 28(3): 96 (2011) - [j21]Weixun Wang, Prabhat Mishra:
Dynamic Reconfiguration of Two-Level Cache Hierarchy in Real-Time Embedded Systems. J. Low Power Electron. 7(1): 17-28 (2011) - [j20]Weixun Wang, Sanjay Ranka, Prabhat Mishra:
Energy-aware dynamic reconfiguration algorithms for real-time multitasking systems. Sustain. Comput. Informatics Syst. 1(1): 35-45 (2011) - [j19]Mingsong Chen, Prabhat Mishra:
Property Learning Techniques for Efficient Generation of Directed Tests. IEEE Trans. Computers 60(6): 852-864 (2011) - [j18]Xiaoke Qin, Chetan Muthry, Prabhat Mishra:
Decoding-Aware Compression of FPGA Bitstreams. IEEE Trans. Very Large Scale Integr. Syst. 19(3): 411-419 (2011) - [c50]Weixun Wang, Prabhat Mishra, Sanjay Ranka:
Dynamic cache reconfiguration and partitioning for energy optimization in real-time multi-core systems. DAC 2011: 948-953 - [c49]Mingsong Chen, Prabhat Mishra:
Decision ordering based property decomposition for functional test generation. DATE 2011: 167-172 - [c48]Hadi Hajimiri, Kamran Rahmani, Prabhat Mishra:
Synergistic integration of dynamic cache reconfiguration and code compression in embedded systems. IGCC 2011: 1-8 - [c47]Xiaoke Qin, Prabhat Mishra:
Efficient directed test generation for validation of multicore architectures. ISQED 2011: 276-283 - [c46]Kanad Basu, Prabhat Mishra, Priyadarsan Patra:
Efficient combination of trace and scan signals for post silicon validation and debug. ITC 2011: 1-8 - [c45]Kartik Shrivastava, Prabhat Mishra:
Dual Code Compression for Embedded Systems. VLSI Design 2011: 177-182 - [c44]Weixun Wang, Sanjay Ranka, Prabhat Mishra:
A General Algorithm for Energy-Aware Dynamic Reconfiguration in Multitasking Systems. VLSI Design 2011: 334-339 - [c43]Kanad Basu, Prabhat Mishra:
Efficient Trace Signal Selection for Post Silicon Validation and Debug. VLSI Design 2011: 352-357 - [c42]Kanad Basu, Prabhat Mishra:
Efficient trace data compression using statically selected dictionary. VTS 2011: 14-19 - 2010
- [j17]Mingsong Chen, Prabhat Mishra, Dhrubajyoti Kalita:
Efficient test case generation for validation of UML activity diagrams. Des. Autom. Embed. Syst. 14(2): 105-130 (2010) - [j16]Prabhat Mishra:
Guest Editorial. J. Electron. Test. 26(2): 149-150 (2010) - [j15]Mingsong Chen, Prabhat Mishra:
Functional Test Generation Using Efficient Property Clustering and Learning Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(3): 396-404 (2010) - [j14]Kanad Basu, Prabhat Mishra:
Test Data Compression Using Efficient Bitmask and Dictionary Selection Methods. IEEE Trans. Very Large Scale Integr. Syst. 18(9): 1277-1286 (2010) - [c41]Weixun Wang, Prabhat Mishra:
PreDVS: preemptive dynamic voltage scaling for real-time systems using approximation scheme. DAC 2010: 705-710 - [c40]Mingsong Chen, Xiaoke Qin, Prabhat Mishra:
Efficient decision ordering techniques for SAT-based test generation. DATE 2010: 490-495 - [c39]Weixun Wang, Xiaoke Qin, Prabhat Mishra:
Temperature- and energy-constrained scheduling in multitasking systems: a model checking approach. ISLPED 2010: 85-90 - [c38]Xiaoke Qin, Mingsong Chen, Prabhat Mishra:
Synchronized Generation of Directed Tests Using Satisfiability Solving. VLSI Design 2010: 351-356 - [c37]Weixun Wang, Prabhat Mishra:
Leakage-Aware Energy Minimization Using Dynamic Voltage Scaling and Cache Reconfiguration in Real-Time Systems. VLSI Design 2010: 357-362 - [e2]Sanjay Ranka, Arunava Banerjee, Kanad Kishore Biswas, Sumeet Dua, Prabhat Mishra, Rajat Moona, Sheung-Hung Poon, Cho-Li Wang:
Contemporary Computing - Third International Conference, IC3 2010, Noida, India, August 9-11, 2010. Proceedings, Part I. Communications in Computer and Information Science 94, Springer 2010, ISBN 978-3-642-14833-0 [contents] - [e1]Sanjay Ranka, Arunava Banerjee, Kanad Kishore Biswas, Sumeet Dua, Prabhat Mishra, Rajat Moona, Sheung-Hung Poon, Cho-Li Wang:
Contemporary Computing - Third International Conference, IC3 2010, Noida, India, August 9-11, 2010, Proceedings, Part II. Communications in Computer and Information Science 95, Springer 2010, ISBN 978-3-642-14824-8 [contents]
2000 – 2009
- 2009
- [j13]Prabhat Mishra:
Guest Editor Introduction: Special Issue on Nano/Bio-Inspired Applications and Architectures. Int. J. Parallel Program. 37(4): 343-344 (2009) - [j12]Xiaoke Qin, Prabhat Mishra:
A Universal Placement Technique of Compressed Instructions for Efficient Parallel Decompression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(8): 1224-1236 (2009) - [j11]Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt:
Hybrid-compiled simulation: An efficient technique for instruction-set architecture simulation. ACM Trans. Embed. Comput. Syst. 8(3): 20:1-20:27 (2009) - [j10]Heon-Mo Koo, Prabhat Mishra:
Functional test generation using design and property decomposition techniques. ACM Trans. Embed. Comput. Syst. 8(4): 32:1-32:33 (2009) - [c36]Thanh Nga Dang, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra:
Generating test programs to cover pipeline interactions. DAC 2009: 142-147 - [c35]Chetan Murthy, Prabhat Mishra:
Bitmask-based control word compression for NISC architectures. ACM Great Lakes Symposium on VLSI 2009: 321-326 - [c34]Priyank Kalla, Prabhat Mishra:
Chairs' welcome message. HLDVT 2009: 1 - [c33]Weixun Wang, Prabhat Mishra:
Dynamic Reconfiguration of Two-Level Caches in Soft Real-Time Embedded Systems. ISVLSI 2009: 145-150 - [c32]Chetan Murthy, Prabhat Mishra:
Lossless Compression Using Efficient Encoding of Bitmasks. ISVLSI 2009: 163-168 - [c31]Prabhat Mishra, Mingsong Chen:
Efficient Techniques for Directed Test Generation Using Incremental Satisfiability. VLSI Design 2009: 65-70 - [c30]Xiaoke Qin, Prabhat Mishra:
Efficient Placement of Compressed Code for Parallel Decompression. VLSI Design 2009: 335-340 - [c29]Weixun Wang, Prabhat Mishra, Ann Gordon-Ross:
SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems. VLSI Design 2009: 547-552 - 2008
- [j9]Seok-Won Seong, Prabhat Mishra:
Bitmask-Based Code Compression for Embedded Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(4): 673-685 (2008) - [j8]Prabhat Mishra, Nikil D. Dutt:
Specification-driven directed test generation for validation of pipelined processors. ACM Trans. Design Autom. Electr. Syst. 13(3): 42:1-42:36 (2008) - [c28]Heon-Mo Koo, Prabhat Mishra:
Specification-based compaction of directed tests for functional validation of pipelined processors. CODES+ISSS 2008: 137-142 - [c27]Kanad Basu, Prabhat Mishra:
A novel test-data compression technique using application-aware bitmask and dictionary selection methods. ACM Great Lakes Symposium on VLSI 2008: 83-88 - [c26]Mingsong Chen, Prabhat Mishra, Dhrubajyoti Kalita:
Coverage-driven automatic test generation for uml activity diagrams. ACM Great Lakes Symposium on VLSI 2008: 139-142 - 2007
- [c25]Xianfeng Li, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra, Xu Cheng:
A Retargetable Software Timing Analyzer Using Architecture Description Language. ASP-DAC 2007: 396-401 - [c24]Seok-Won Seong, Prabhat Mishra:
An efficient code compression technique using application-aware bitmask and dictionary selection methods. DATE 2007: 582-587 - [c23]Mingsong Chen, Prabhat Mishra, Dhrubajyoti Kalita:
Towards RTL test generation from SystemC TLM specifications. HLDVT 2007: 91-96 - 2006
- [j7]Mehrdad Reshadi, Nikil D. Dutt, Prabhat Mishra:
A retargetable framework for instruction-set architecture simulation. ACM Trans. Embed. Comput. Syst. 5(2): 431-452 (2006) - [j6]Prabhat Mishra, Aviral Shrivastava, Nikil D. Dutt:
Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs. ACM Trans. Design Autom. Electr. Syst. 11(3): 626-658 (2006) - [c22]Heon-Mo Koo, Prabhat Mishra:
Functional test generation using property decompositions for validation of pipelined processors. DATE 2006: 1240-1245 - [c21]Heon-Mo Koo, Prabhat Mishra:
Test generation using SAT-based bounded model checking for validation of pipelined processors. ACM Great Lakes Symposium on VLSI 2006: 362-365 - [c20]Seok-Won Seong, Prabhat Mishra:
A bitmask-based code compression technique for embedded systems. ICCAD 2006: 251-254 - [c19]Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy S. Abadir:
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study. MTV 2006: 33-36 - 2005
- [b1]Prabhat Mishra, Nikil D. Dutt:
Functional verification of programmable embedded architectures - a top-down approach. Springer 2005, ISBN 978-0-387-26143-0, pp. I-XVIII, 1-180 - [j5]Prabhat Mishra, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir:
A methodology for validation of microprocessors using symbolic simulation. Int. J. Embed. Syst. 1(1/2): 14-22 (2005) - [c18]Mehrdad Reshadi, Prabhat Mishra:
Memory access optimizations in instruction-set simulators. CODES+ISSS 2005: 237-242 - [c17]Prabhat Mishra, Nikil D. Dutt:
Functional Coverage Driven Test Generation for Validation of Pipelined Processors. DATE 2005: 678-683 - [c16]Prabhat Mishra, Heon-Mo Koo, Zhuo Huang:
Language-driven Validation of Pipelined Processors using Satisfiability Solvers. MTV 2005: 119-126 - 2004
- [j4]Prabhat Mishra, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir:
A Top-Down Methodology for Microprocessor Validation. IEEE Des. Test Comput. 21(2): 122-131 (2004) - [j3]Prabhat Mishra, Nikil D. Dutt:
Modeling and validation of pipeline specifications. ACM Trans. Embed. Comput. Syst. 3(1): 114-139 (2004) - [j2]Prabhat Mishra, Mahesh Mamidipaka, Nikil D. Dutt:
Processor-memory coexploration using an architecture description language. ACM Trans. Embed. Comput. Syst. 3(1): 140-162 (2004) - [c15]Prabhat Mishra, Nikil D. Dutt:
Graph-Based Functional Test Program Generation for Pipelined Processors. DATE 2004: 182-187 - [c14]Prabhat Mishra, Nikil D. Dutt:
Functional Validation of Programmable Architectures. DSD 2004: 12-19 - [c13]Prabhat Mishra, Nikil D. Dutt, Yaron Kashai:
Functional Verification of Pipelined Processors: A Case Study. MTV 2004: 79-84 - [c12]Prabhat Mishra, Arun Kejariwal, Nikil D. Dutt:
Synthesis-driven Exploration of Pipelined Embedded Processors. VLSI Design 2004: 921-926 - 2003
- [j1]Prabhat Mishra, Nikil D. Dutt, Hiroyuki Tomiyama:
Towards Automatic Validation of Dynamic Behavior in Pipelined Processor Specifications. Des. Autom. Embed. Syst. 8(2-3): 249-265 (2003) - [c11]Mehrdad Reshadi, Nikhil Bansal, Prabhat Mishra, Nikil D. Dutt:
An efficient retargetable framework for instruction-set simulation. CODES+ISSS 2003: 13-18 - [c10]Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt:
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation. DAC 2003: 758-763 - [c9]Prabhat Mishra, Nikil D. Dutt:
A Methodology for Validation of Microprocessors using Equivalence Checking. MTV 2003: 83-88 - [c8]Prabhat Mishra, Arun Kejariwal, Nikil D. Dutt:
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models. IEEE International Workshop on Rapid System Prototyping 2003: 226-232 - 2002
- [c7]Prabhat Mishra, Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama:
Automatic Verification of In-Order Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units. DATE 2002: 36-43 - [c6]Prabhat Mishra, Nikil D. Dutt:
Automatic functional test program generation for pipelined processors using model checking. HLDVT 2002: 99-103 - [c5]Prabhat Mishra, Nikil D. Dutt:
Modeling and Verification of Pipelined Embedded Processors in the Presence of Hazards and Exceptions. DIPES 2002: 81-90 - [c4]Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, Peter Grun, Nikil D. Dutt, Alexandru Nicolau:
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language. ASP-DAC/VLSI Design 2002: 458- - 2001
- [c3]Prabhat Mishra, Nikil D. Dutt, Alex Nicolau:
Automatic validation of pipeline specifications. HLDVT 2001: 9-13 - [c2]Prabhat Mishra, Nikil D. Dutt, Alexandru Nicolau:
Functional abstraction driven design space exploration of heterogeneous programmable architectures. ISSS 2001: 256-261 - [c1]Prabhat Mishra, Peter Grun, Nikil D. Dutt, Alexandru Nicolau:
Processor-Memory Co-Exploration driven by a Memory-Aware Architecture Description Language. VLSI Design 2001: 70-75
Coauthor Index
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