"Implementation and Investigation of an Optimal Full Adder Design for Low ..."

K. Praghash et al. (2022)

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DOI: 10.1007/S11277-022-09851-3

access: closed

type: Journal Article

metadata version: 2022-11-13

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  - https://dblp.org/rec/journals/wpc/PraghashMTPC22
K. Praghash, S. Arun Metha, B. Sai Tanuja, K. Preethi, N. P. N. S. Chandana:
Implementation and Investigation of an Optimal Full Adder Design for Low Power and Reduced Delay Conditions. Wirel. Pers. Commun. 126(4): 3041-3069 (2022)

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