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ORCID23rd DSD 2020: Kranj, Slovenia
- 23rd Euromicro Conference on Digital System Design, DSD 2020, Kranj, Slovenia, August 26-28, 2020. IEEE 2020, ISBN 978-1-7281-9535-3
DSD: Digital System Design
- Andrej Zemva, Andrej Trost:
Message from the Program Chairs. xxiii-xxiv - Omair Rafique, Klaus Schneider
:
SHeD: A Framework for Automatic Software Synthesis of Heterogeneous Dataflow Process Networks. 1-10 - Andrej Skraba:
Message from the General Chair. 1-2 - Steffen Zeidler, Oliver Schrape, Anselm Breitenreiter, Milos Krstic:
A Glitch-free Clock Multiplexer for Non-Continuously Running Clocks. 11-15 - Amna Gharbi, Andrea Enrici, Bogdan Uscumlic, Ludovic Apvrille, Renaud Pacalet:
Efficient and Exact Design Space Exploration for Heterogeneous and Multi-Bus Platforms. 16-23 - Mitko Veleski, Michael Hübner, Milos Krstic, Rolf Kraemer:
Highly Configurable Framework for Adaptive Low Power and Error-Resilient System-On-Chip. 24-28 - Gianluca Martino, Heinz Riener, Görschwin Fey:
Revisiting Explicit Enumeration for Exact Synthesis. 29-34 - Michael Werner, Igli Zeraliu, Zhao Han, Sebastian Siegfried Prebeck, Lorenzo Servadei, Wolfgang Ecker:
Optimized HW/FW Generation from an Abstract Register Interface Model. 35-39 - Georgiy Krylov, Jean-Philippe Legault, Kenneth B. Kent:
Hard and Soft Logic Trade-offs for Multipliers in VTR. 40-43 - Shima Hosseinzadeh, Mehrdad Biglari, Dietmar Fey:
TReMo: A Model for Ternary ReRAM-Based Memories with Adjustable Write-Verification Capabilities. 44-48 - Lukás Kekely, Jakub Cabal, Viktor Pus, Jan Korenek:
Multi Buses: Theory and Practical Considerations of Data Bus Width Scaling in FPGAs. 49-56 - Matteo Bertolino, Renaud Pacalet, Ludovic Apvrille, Andrea Enrici:
Efficient Scheduling of FPGAs for Cloud Data Center Infrastructures. 57-64 - Emilien Fournier, Ciprian Teodorov, Loïc Lagadec:
Menhir: Generic High-Speed FPGA Model-Checker. 65-72 - Jorge Andrés Palacios, Vincenzo Caro, Miguel Durán, Miguel E. Figueroa:
A hardware architecture for Multiscale Retinex with Chromacity Preservation on an FPGA. 73-80 - Humberto Carvalho, Geoffrey Nelissen, Pavel Zaykov:
mcQEMU: Time-Accurate Simulation of Multi-core platforms using QEMU. 81-88 - Gautier Berthou, Kevin Marquet, Tanguy Risset, Guillaume Salagnac:
MPU-based incremental checkpointing for transiently-powered systems. 89-96 - Tomás Benes, Michal Kekely, Karel Hynek, Tomás Cejka:
Pipelined ALU for effective external memory access in FPGA. 97-100 - Eishi Arima:
Classification-Based Unified Cache Replacement via Partitioned Victim Address History. 101-108 - Thomas Fehmel, Viet-Tan Nguyen, Dominik Stoffel, Wolfgang Kunz:
Automatic State Space Analysis for Modeling Untrusted Embedded Device Drivers. 109-116 - Vittoriano Muttillo, Giacomo Valente, Luigi Pomante, Hector Posadas, Javier Merino, Eugenio Villar:
Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow. 117-125 - Matteo Bertolucci, Francesco Falaschi, Riccardo Cassettari, Daniele Davalle, Luca Fanucci:
A Comprehensive Trade-off Analysis on the CCSDS 131.2-B-1 Extended ModCod (SCCC-X) Implementation. 126-132 - Svetlana Minakova, Todor P. Stefanov:
Buffer Sizes Reduction for Memory-efficient CNN Inference on Mobile and Embedded Devices. 133-140 - Javier E. Soto, Paulo Ubisse, Cecilia Hernández, Miguel E. Figueroa:
A hardware accelerator for entropy estimation using the top-k most frequent elements. 141-148 - Fritjof Steinert, Niklas Schelten, Anton Schulte, Benno Stabernack:
Hardware and Software Components towards the Integration of Network-Attached Accelerators into Data Centers. 149-153 - Kai Lehniger, Marcin J. Aftowicz, Peter Langendörfer, Zoya Dyka:
Challenges of Return-Oriented-Programming on the Xtensa Hardware Architecture. 154-158 - Simone Crippa, Giuseppe Massari, Federico Reghenzani, Michele Zanella, William Fornaciari:
Predictive Resource Management in Energy-constrained Embedded Systems. 159-166 - Waqar Ahmad, Berke Ayrancioglu, Ilker Hamzaoglu:
Comparison of Approximate Circuits for H.264 and HEVC Motion Estimation. 167-173 - Jordane Lorandel, Habiba Lahdhiri, Emmanuelle Bourdel, Salvatore Monteleone, Maurizio Palesi:
Efficient Compression Technique for NoC-based Deep Neural Network Accelerators. 174-179 - Giulio Stramondo, Manil Dev Gomony, Bartek Kozicki, Cees de Laat, Ana Lucia Varbanescu:
μ-Genie: A Framework for Memory-Aware Spatial Processor Architecture Co-Design Exploration. 180-184
AHSA: Architectures and Hardware for Security Applications
- Maxime Montoya, Simone Bacles-Min, Anca Molnos, Jacques J. A. Fournier:
Dynamic encoding, a lightweight combined countermeasure against hardware attacks. 185-192 - Petr Socha, Martin Novotný:
Towards High-Level Synthesis of Polymorphic Side-Channel Countermeasures. 193-199 - Johannes Winkler, Andrea Höller, Christian Steger:
Optimizing Picnic for Limited Memory Resources. 200-204 - Filip Kodýtek, Róbert Lórencz, Jirí Bucek:
Comparison of three counter value based ROPUFs on FPGA. 205-212 - Ameer Shalabi, Tara Ghasempouri, Peeter Ellervee, Jaan Raik:
SCAAT: Secure Cache Alternative Address Table for mitigating cache logical side-channel attacks. 213-217 - Lampros Pyrgas, Aliki Panagiotarou, Paris Kitsos:
Are ring oscillators without a combinatorial loop good enough for Hardware Trojan detection? 218-221 - Etienne Tehrani, Tarik Graba, Abdelmalek Si-Merabet, Jean-Luc Danger:
RISC-V Extension for Lightweight Cryptography. 222-228 - Dorian Amiet, Lukas Leuenberger, Andreas Curiger, Paul Zbinden:
FPGA-based SPHINCS+ Implementations: Mind the Glitch. 229-237 - Dmytro Petryk, Zoya Dyka, Eduardo Pérez, Mamathamba Kalishettyhalli Mahadevaiaha, Ievgen Kabin, Christian Wenger, Peter Langendörfer:
Evaluation of the Sensitivity of RRAM Cells to Optical Fault Injection Attacks. 238-245 - Olivier Savry, Mustapha El-Majihi, Thomas Hiscock:
Confidaent: Control FLow protection with Instruction and Data Authenticated Encryption. 246-253 - Milad Bahadori, Kimmo Järvinen:
A Programmable SoC Implementation of the DGK Cryptosystem for Privacy-Enhancing Technologies. 254-261 - Arish Sateesan, Jo Vliegen, Joan Daemen, Nele Mentens:
Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications. 262-269 - Ievgen Kabin, Zoya Dyka, Dan Klann, Nele Mentens, Lejla Batina, Peter Langendörfer:
Breaking a fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves. 270-276 - Marios Tsavos, Nicolas Sklavos, George Ph. Alexiou:
Lightweight Security Data Streaming, Based on Reconfigurable Logic, for FPGA Platform. 277-280 - Petr Moucha, Stanislav Jerábek, Martin Novotný:
Novel Controller for Dummy Rounds Scheme DPA Countermeasure. 281-284
ASHWPA: Advanced Systems in Healthcare, Wellness and Personal Assistance
- Maurizio Mongelli, Vanessa Orani, Enrico Cambiaso, Ivan Vaccari, Alessia Paglialonga, Fulvio Braido, Chiara Eva Catalano:
Challenges and Opportunities of IoT and AI in Pneumology. 285-292 - Emanuele Torti, Cristina D'Amato, Giovanni Danese, Francesco Leporati:
An Hardware Recurrent Neural Network for Wearable Devices. 293-300 - Konstantinos Nomikos, Athanasios Papadimitriou, George Stergiopoulos, Dimitris Koutras, Mihalis Psarakis, Panayiotis Kotzanikolaou:
On a Security-oriented Design Framework for Medical IoT Devices: The Hardware Security Perspective. 301-308 - Antonio De Vita, Danilo Pau, Luigi Di Benedetto, Alfredo Rubino, Frédéric Pétrot, Gian Domenico Licciardo:
Low Power Tiny Binary Neural Network with improved accuracy in Human Recognition Systems. 309-315 - José Machado da Silva, Ilaria Cerrone, Daniel Malagón, Jorge Marinho, Stephen Mundy, João Gaspar, Joaquim Gabriel Mendes:
An Active Implant to Restore Dental Proprioceptivity. 316-319 - Christian Zajc, Gerald Holweg, Christian Steger:
System Architecture and Security Issues of Smartphone-based Point-Of-Care Devices. 320-324
DCPS: Design of Cyber-Physical Systems
- Antti Rautakoura, Matti Käyrä, Timo D. Hämäläinen, Wolfgang Ecker, Esko Pekkarinen, Mikko Teuho:
Kamel: IP-XACT compatible intermediate meta-model for IP generation. 325-331 - Dongning Ma, Xun Jiao:
AxBy: Approximate Computation Bypass for Data-Intensive Applications. 332-339 - T. Gokulan, Akshay Muraleedharan, Kuruvilla Varghese:
Design of a 32-bit, dual pipeline superscalar RISC-V processor on FPGA. 340-343
EPDSD: European Projects in Digital System Design
- Irune Agirre, Peio Onaindia, Tomaso Poggi, Irune Yarza, Francisco J. Cazorla, Leonidas Kosmidis, Kim Grüttner, Mohammed Abuteir, Jan Loewe, Juan M. Orbegozo, Stefania Botta:
UP2DATE: Safe and secure over-the-air software updates on high-performance mixed-criticality systems. 344-351 - Raul Barbosa, Stylianos Basagiannis, Georgios Giantamidis, H. Becker, Enrico Ferrari, J. Jahic, A. Kanak, Mikel Labayen Esnaola, Vanessa Orani, David Pereira, Luigi Pomante, Rupert Schlick, Ales Smrcka, Ahmet Yazici, Peter Folkesson, Behrooz Sangchoolie:
The VALU3S ECSEL Project: Verification and Validation of Automated Systems Safety and Security. 352-359 - Norbert Druml, Björn Debaillie, Andrei Anghel, Nicolae-Catalin Ristea, Jonas Fuchs, Anand Dubey, Torsten Reißland, Maike Hartstem, Viktor Rack, Anna Ryabokon, Kaspars Ozols, Rihards Novickis, Aleksandrs Levinskis, Omar Veledar, Georg Macher, Johannes Jany-Luig, Selim Solmaz, Jakob Reckenzaun, Naveen Mohan, Shai Ophir, Georg Stettinger, Sergio E. Diaz, Mauricio Marcano, Jorge Villagra, Andrea Castellano, Rutger Beekelaar, Fabio Tango, Jarno Vanne, Kalle Holma, Oguz Icoglu, George Dimitrakopoulos:
Programmable Systems for Intelligence in Automobiles (PRYSTINE): Technical Progress after Year 2. 360-369 - Carles Hernández, José Flich, Roberto Paredes, Charles-Alexis Lefebvre, Imanol Allende, Jaume Abella, David Trillin, Martin Matschnig, Bernhard Fischer, Konrad Schwarz, Jan Kiszka, Martin Rönnbäck, Johan Klockars, Nicholas Mc Guire, Franz Rammerstorfer, Christian Schwarzl, Franck Wartel, Dierk Lüdemann, Mikel Labayen:
SELENE: Self-Monitored Dependable Platform for High-Performance Safety-Critical Systems. 370-377 - Luigi Pomante, Francesca Palumbo, Claudia Rinaldi, Giacomo Valente, Carlo Sau, Tiziana Fanni, Frank van der Linden, Twan Basten, Marc Geilen, Geran Peeren, Jirí Kadlec, Pekka Jääskeläinen, Marcos Martinez de Alejandro, Jukka Saarinen, Tero Säntti, Maria Katiuscia Zedda, Victor Sanchez, Dip Goswami, Zaid Al-Ars, Ad de Beer:
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project. 378-385 - Nicolas Sklavos, Simona Francese:
MULTI-modal Imaging of FOREnsic SciEnce Evidence: MULTI-FORESEE Project. 386-392 - Aizea Lojo, Leire Rubio, Jesus Miguel Ruano, Tania Di Mascio, Luigi Pomante, Enrico Ferrari, Ignacio Garcìa Vega, Frank K. Gürkaynak, Mikel Labayen Esnaola, Vanessa Orani, Jaume Abella:
The ECSEL FRACTAL Project: A Cognitive Fractal and Secure edge based on a unique Open-Safe-Reliable-Low Power Hardware Platform. 393-400
FTET: Future Trends in Emerging Technologies
- Philipp Niemann, Alexandre A. A. de Almeida, Gerhard W. Dueck, Rolf Drechsler:
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers. 401-407 - Umberto Garlando, Marcel Walter, Robert Wille, Fabrizio Riente, Frank Sill Torres, Rolf Drechsler:
ToPoliNano and fiction: Design Tools for Field-coupled Nanocomputing. 408-415 - Rozaliya Amirova, Vladimir Ivanov, Sergey Masyagin, Aldo Spallone, Giancarlo Succi:
Preliminary findings on tools for the analysis of mental activity of programmers using EEG data from portable devices. 416-419 - L. E. Pedraza Caballero, Michelle Povinelli, Jhonattan C. Ramirez, Paulo Guimarães, Omar P. Vilela Neto:
Design of Compact Integrated Photonic Crystal NAND and NOR Logic Gates. 420-427 - Martin Lukac, Saadat Nursultan, Georgiy Krylov, Oliver Keszöcze:
Geometric Refactoring of Quantum and Reversible Circuits: Quantum Layout. 428-435 - Raphael Ponsard, Nicolas Janvier, Dominique Houzet, Vincent Fristot, Wassim Mansour:
Online GPUAnalysis using Adaptive DMA Controlled by Softcore for 2D Detectors. 436-439
ASAASIT: Architectures and Systems for Automotive, Aeronautic, Space and Intelligent Transportation
- Ahmed Amrani, Hakim Arezki, David Lellouche, Vivien Gazeau, Corinne Fillol, Oussama Allali, Thomas Lacroix:
Architecture of a Public Transport Supervision System Using Hybridization Models Based on Real and Predictive Data. 440-446 - Josef Steinbaeck, Christian Steger, Eugen Brenner, Norbert Druml:
A Hybrid Timestamping Approach for Multi-Sensor Perception Systems. 447-454 - Philipp Weber, Philipp Weiss, Dominik Reinhardt, Sebastian Steinhorst:
Energy-Optimized Elastic Application Distribution for Automotive Systems in Hybrid Cloud Architectures. 455-462 - Andreas Strasser, Philipp Stelzer, Felix Warmer, Christian Steger, Norbert Druml:
Enabling Fail-Operational Behavior and Degradation for Safety-Critical Automotive 3D Flash LiDAR Systems. 463-468 - Ievgeniia Maksymova, Philipp Greiner, Christian Steger, Leonhard Christian Niedermueller, Norbert Druml:
Adaptive MEMS Mirror Control for Reliable Automotive Driving Assistance Applications. 469-475 - Jörg Grieser, Meng Zhang, Tim Warnecke, Andreas Rausch:
Assuring the Safety of End-to-End Learning-Based Autonomous Driving through Runtime Monitoring. 476-483 - Marko S. Andjelkovic, Aleksandar Simevski, Junchao Chen, Oliver Schrape, Zoran Stamenkovic, Milos Krstic, Stefan D. Ilic, Luka Spahic, Laza Kostic, Goran S. Ristic, Aleksandar Jaksic, Alberto J. Palma, Antonio M. Lallena, Miguel Ángel Carvajal:
Design of Radiation Hardened RADFET Readout System for Space Applications. 484-488
SDCIS: System Design for Collaborating Intelligent Systems
- Mahmoud Hussein, Réda Nouacer, Yassine Ouhammou, Eugenio Villar, Federico Corradi, Carlo Tieri, Rodrigo Castiñeira:
Key Enabling Technologies for Drones. 489-496 - Gerd vom Bögel, Linda Cousin, Nicolai Iversen, Emad Samuel Malki Ebeid, Andreas Hennig:
Drones for Inspection of Overhead Power Lines with Recharge Function. 497-502 - Oscar Bowen Schofield, Kasper Høj Lorenzen, Emad Ebeid:
Cloud to Cable: A Drone Framework for Autonomous Power line Inspection. 503-509
AMDL: Applications, Architectures, Methods and Tools for Machine and Deep Learning
- Eduardo Yago, Pau Castelló, Salvador Petit, María Engracia Gómez, Julio Sahuquillo:
Impact of the Array Shape and Memory Bandwidth on the Execution Time of CNN Systolic Arrays. 510-517 - Rolf Drechsler, Sebastian Huhn, Christina Plump:
Combining Machine Learning and Formal Techniques for Small Data Applications - A Framework to Explore New Structural Materials. 518-525 - Habiba Lahdhiri, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Giuseppe Ascia, Jordane Lorandel, Emmanuelle Bourdel, Vincenzo Catania:
DNNZip: Selective Layers Compression Technique in Deep Neural Network Accelerators. 526-533 - Abdus Sami Hassan, Tooba Arifeen, Jeong-A Lee:
Data Footprint Reduction in DNN Inference by Sensitivity-Controlled Approximations with Online Arithmetic. 534-541 - Pierre-Emmanuel Novac, Andrea Castagnetti, Adrien Russo, Benoît Miramond, Alain Pegatoquet, François Verdier:
Toward unsupervised Human Activity Recognition on Microcontroller Units. 542-550 - Konrad Komisarczyk, Lorenzo Chelini, Kanishkan Vadivel, Roel Jordans, Henk Corporaal:
PET-to-MLIR: A polyhedral front-end for MLIR. 551-556 - Jacob Høxbroe Jeppesen, Rune Hylsberg Jacobsen, Rasmus Nyholm Jørgensen:
Crop Type Classification based on Machine Learning with Multitemporal Sentinel-1 Data. 557-564 - Mikel Etxeberria-Garcia, Fernando Ezaguirre, Joanes Plazaola, Unai Muñoz, Maider Zamalloa:
Embedded object detection applying Deep Neural Networks in railway domain. 565-569
SPCPS: Security and Privacy of Cyber-Physical Systems
- Tim Fritzmann, Jonas Vith, Johanna Sepúlveda:
Strengthening Post-Quantum Security for Automotive Systems. 570-576 - Walter Tiberti, Alessio Carmenini, Luigi Pomante, Dajana Cassioli:
A Lightweight Blockchain-based Technique for Anti-Tampering in Wireless Sensor Networks. 577-582 - Tobias Gehrmann, Paul Duplys:
Intrusion Detection for SOME/IP: Challenges and Opportunities. 583-587 - Luigi Pomante, Marco Pugliese, Luciano Bozzi, Walter Tiberti, D. Grimani, Fortunato Santucci:
SEAMLESS Project: Development of a Performing Secure Platform for IEEE 802.15.4 WSN Applications. 588-595 - Tobias Dörr, Timo Sandmann, Jürgen Becker:
A Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded Systems. 596-603 - Muhammad Usama Sardar, Do Le Quoc, Christof Fetzer:
Towards Formalization of Enhanced Privacy ID (EPID)-based Remote Attestation in Intel SGX. 604-607
DTFT: Dependability, Testing and Fault Tolerance in Digital Systems
- Marcos Santana Farias, Nadia Nedjah, Paulo Victor R. de Carvalho:
Active Redundant Hardware Architecture for Increased Reliability in FPGA-Based Nuclear Reactors Critical Systems. 608-615 - Oliver Schrape, Marko S. Andjelkovic, Anselm Breitenreiter, Alexey Balashov, Milos Krstic:
Design Concept for Radiation-Hardening of Triple Modular Redundancy TSPC Flip-Flops. 616-621 - Petr Dobiás, Emmanuel Casseau, Oliver Sinnen:
Evaluation of Fault Tolerant Online Scheduling Algorithms for CubeSats. 622-629 - Tobias Dörr, Timo Sandmann, Patrick Friederich, Arnd Leitner, Jürgen Becker:
An Approach to Cost-Efficient Fault Tolerance in Inherently Redundant Fail-Operational Systems. 630-637 - Mohammad Riazati, Tara Ghasempouri, Masoud Daneshtalab, Jaan Raik, Mikael Sjödin, Björn Lisper:
Adjustable self-healing methodology for accelerated functions in heterogeneous systems. 638-645 - Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik:
Implementation-Independent Functional Test for Transition Delay Faults in Microprocessors. 646-650 - Caterina Nahler, Christian Steger, Norbert Druml:
Quantitative and Qualitative Evaluation Methods of Automotive Time of Flight Based Sensors. 651-659 - Umar Afzaal, Jeong-A Lee:
Trading the Reliability of Approximate TMR in FPGAs with the Cost of Mitigation. 660-663 - Jan Reznícek, Martin Kohlík, Hana Kubátová:
Non-Homogeneous Continuous Time Markov Chains Calculations. 664-671 - Annachiara Ruospo, Alberto Bosio, Alessandro Ianne, Ernesto Sánchez:
Evaluating Convolutional Neural Networks Reliability depending on their Data Representation. 672-679 - Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek:
Hardening of Smart Electronic Lock Software against Random and Deliberate Faults. 680-683 - Jaroslav Borecký, Robert Hülle, Petr Fiser:
Evaluation of the SEU Faults Coverage of a Simple Fault Model for Application-Oriented FPGA Testing. 684-691
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